Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(1026)

Side by Side Diff: src/arm/macro-assembler-arm.cc

Issue 11663005: Adapt Danno's Track Allocation Info idea to fast literals. When allocating a literal array, (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Ported to other platforms Created 7 years, 11 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
OLDNEW
1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 3865 matching lines...) Expand 10 before | Expand all | Expand 10 after
3876 ldr(r2, FieldMemOperand(r2, JSObject::kElementsOffset)); 3876 ldr(r2, FieldMemOperand(r2, JSObject::kElementsOffset));
3877 cmp(r2, empty_fixed_array_value); 3877 cmp(r2, empty_fixed_array_value);
3878 b(ne, call_runtime); 3878 b(ne, call_runtime);
3879 3879
3880 ldr(r2, FieldMemOperand(r1, Map::kPrototypeOffset)); 3880 ldr(r2, FieldMemOperand(r1, Map::kPrototypeOffset));
3881 cmp(r2, null_value); 3881 cmp(r2, null_value);
3882 b(ne, &next); 3882 b(ne, &next);
3883 } 3883 }
3884 3884
3885 3885
3886 void MacroAssembler::PerformAllocationSiteInfoCheck(
3887 Label* allocation_info_present) {
3888 Label no_info_available;
3889 // ----------- S t a t e -------------
3890 // -- r2 : receiver
danno 2013/01/04 08:50:55 Pass in receiver_reg and scratch_reg.
mvstanton 2013/01/04 12:07:52 Done.
3891 // r4 is clobbered.
3892 // -----------------------------------
3893 ExternalReference new_space_start =
3894 ExternalReference::new_space_start(isolate());
3895 ExternalReference new_space_allocation_top =
3896 ExternalReference::new_space_allocation_top_address(isolate());
3897
3898 ldr(r4, FieldMemOperand(r2, JSArray::kSize + AllocationSiteInfo::kSize));
3899 cmp(r4, Operand(new_space_start));
3900 b(lt, &no_info_available);
3901 cmp(r4, Operand(new_space_allocation_top));
3902 b(hs, &no_info_available);
3903 ldr(r4, MemOperand(r4, 0));
3904 cmp(r4,
3905 Operand(Handle<Map>(isolate()->heap()->
3906 allocation_site_info_map())));
danno 2013/01/04 08:50:55 nit: formatting above, Operand can be on same line
mvstanton 2013/01/04 12:07:52 Done.
3907
3908 // Use the j/jmp sequence below for debugging, but the j(equal) sequence
danno 2013/01/04 08:50:55 Keep the sequence below uncommented on this and ot
mvstanton 2013/01/04 12:07:52 I decided to remove it because debug_code should b
3909 // for production.
3910 // b(not_equal, &no_info_available);
3911 // int3();
3912 // jmp(allocation_info_present);
3913 // or
3914 b(eq, allocation_info_present);
3915 bind(&no_info_available);
3916 }
3917
3918
3886 #ifdef DEBUG 3919 #ifdef DEBUG
3887 bool AreAliased(Register reg1, 3920 bool AreAliased(Register reg1,
3888 Register reg2, 3921 Register reg2,
3889 Register reg3, 3922 Register reg3,
3890 Register reg4, 3923 Register reg4,
3891 Register reg5, 3924 Register reg5,
3892 Register reg6) { 3925 Register reg6) {
3893 int n_of_valid_regs = reg1.is_valid() + reg2.is_valid() + 3926 int n_of_valid_regs = reg1.is_valid() + reg2.is_valid() +
3894 reg3.is_valid() + reg4.is_valid() + reg5.is_valid() + reg6.is_valid(); 3927 reg3.is_valid() + reg4.is_valid() + reg5.is_valid() + reg6.is_valid();
3895 3928
(...skipping 46 matching lines...) Expand 10 before | Expand all | Expand 10 after
3942 void CodePatcher::EmitCondition(Condition cond) { 3975 void CodePatcher::EmitCondition(Condition cond) {
3943 Instr instr = Assembler::instr_at(masm_.pc_); 3976 Instr instr = Assembler::instr_at(masm_.pc_);
3944 instr = (instr & ~kCondMask) | cond; 3977 instr = (instr & ~kCondMask) | cond;
3945 masm_.emit(instr); 3978 masm_.emit(instr);
3946 } 3979 }
3947 3980
3948 3981
3949 } } // namespace v8::internal 3982 } } // namespace v8::internal
3950 3983
3951 #endif // V8_TARGET_ARCH_ARM 3984 #endif // V8_TARGET_ARCH_ARM
OLDNEW

Powered by Google App Engine
This is Rietveld 408576698