Index: src/arm/deoptimizer-arm.cc |
diff --git a/src/arm/deoptimizer-arm.cc b/src/arm/deoptimizer-arm.cc |
index 0cca5fdadcb33c72d47498488f6d7a2cf0b7ef93..85b62da9e611ddd23bcf8e3f44d77d549dff99d0 100644 |
--- a/src/arm/deoptimizer-arm.cc |
+++ b/src/arm/deoptimizer-arm.cc |
@@ -533,6 +533,11 @@ void Deoptimizer::DoCompiledStubFrame(TranslationIterator* iterator, |
DoTranslateCommand(iterator, 0, output_frame_offset); |
} |
+ for (int i = 0; i < DwVfpRegister::kMaxNumRegisters; ++i) { |
+ double double_value = input_->GetDoubleRegister(i); |
+ output_frame->SetDoubleRegister(i, double_value); |
+ } |
+ |
value = input_->GetRegister(fp.code()); |
output_frame->SetRegister(fp.code(), value); |
output_frame->SetFp(value); |
@@ -1158,21 +1163,18 @@ void Deoptimizer::EntryGenerator::Generate() { |
if (CpuFeatures::IsSupported(VFP2)) { |
CpuFeatures::Scope scope(VFP2); |
- // In case of OSR, we have to restore the d registers. |
- if (type() == OSR) { |
- // Check CPU flags for number of registers, setting the Z condition flag. |
- __ CheckFor32DRegs(ip); |
- |
- __ ldr(r1, MemOperand(r0, Deoptimizer::input_offset())); |
- int src_offset = FrameDescription::double_registers_offset(); |
- for (int i = 0; i < DwVfpRegister::kNumRegisters; ++i) { |
- if (i == kDoubleRegZero.code()) continue; |
- if (i == kScratchDoubleReg.code()) continue; |
- |
- const DwVfpRegister reg = DwVfpRegister::from_code(i); |
- __ vldr(reg, r1, src_offset, i < 16 ? al : ne); |
- src_offset += kDoubleSize; |
- } |
+ // Check CPU flags for number of registers, setting the Z condition flag. |
+ __ CheckFor32DRegs(ip); |
+ |
+ __ ldr(r1, MemOperand(r0, Deoptimizer::input_offset())); |
+ int src_offset = FrameDescription::double_registers_offset(); |
+ for (int i = 0; i < DwVfpRegister::kMaxNumRegisters; ++i) { |
+ if (i == kDoubleRegZero.code()) continue; |
+ if (i == kScratchDoubleReg.code()) continue; |
+ |
+ const DwVfpRegister reg = DwVfpRegister::from_code(i); |
+ __ vldr(reg, r1, src_offset, i < 16 ? al : ne); |
+ src_offset += kDoubleSize; |
} |
} |