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1 ; This test checks that undef values are represented as zero. | 1 ; This test checks that undef values are represented as zero. |
2 | 2 |
3 ; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 \ | 3 ; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 \ |
4 ; RUN: | FileCheck %s | 4 ; RUN: | FileCheck %s |
5 ; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 \ | 5 ; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 \ |
6 ; RUN: | FileCheck %s | 6 ; RUN: | FileCheck %s |
7 ; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 -mattr=sse4.1 \ | 7 ; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 -mattr=sse4.1 \ |
8 ; RUN: | FileCheck %s | 8 ; RUN: | FileCheck %s |
9 ; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 -mattr=sse4.1 \ | 9 ; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 -mattr=sse4.1 \ |
10 ; RUN: | FileCheck %s | 10 ; RUN: | FileCheck %s |
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175 ret <4 x float> %val | 175 ret <4 x float> %val |
176 ; CHECK-LABEL: vector_insertelement_arg1 | 176 ; CHECK-LABEL: vector_insertelement_arg1 |
177 ; CHECK: pxor | 177 ; CHECK: pxor |
178 } | 178 } |
179 | 179 |
180 define <4 x float> @vector_insertelement_arg2(<4 x float> %arg) { | 180 define <4 x float> @vector_insertelement_arg2(<4 x float> %arg) { |
181 entry: | 181 entry: |
182 %val = insertelement <4 x float> %arg, float undef, i32 0 | 182 %val = insertelement <4 x float> %arg, float undef, i32 0 |
183 ret <4 x float> %val | 183 ret <4 x float> %val |
184 ; CHECK-LABEL: vector_insertelement_arg2 | 184 ; CHECK-LABEL: vector_insertelement_arg2 |
185 ; CHECK: movss {{.*}},DWORD PTR {{.*}} .L$float$0 | 185 ; CHECK: {{movss|insertps}} {{.*}},DWORD PTR {{.*}} .L$float$0 |
186 } | 186 } |
187 | 187 |
188 define float @vector_extractelement_v4f32_index_0() { | 188 define float @vector_extractelement_v4f32_index_0() { |
189 entry: | 189 entry: |
190 %val = extractelement <4 x float> undef, i32 0 | 190 %val = extractelement <4 x float> undef, i32 0 |
191 ret float %val | 191 ret float %val |
192 ; CHECK-LABEL: vector_extractelement_v4f32_index_0 | 192 ; CHECK-LABEL: vector_extractelement_v4f32_index_0 |
193 ; CHECK: pxor | 193 ; CHECK: pxor |
194 } | 194 } |
195 | 195 |
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274 ; CHECK: pxor | 274 ; CHECK: pxor |
275 } | 275 } |
276 | 276 |
277 define <4 x float> @vector_select_v4f32_arg2(<4 x i1> %cond, <4 x float> %a) { | 277 define <4 x float> @vector_select_v4f32_arg2(<4 x i1> %cond, <4 x float> %a) { |
278 entry: | 278 entry: |
279 %val = select <4 x i1> %cond, <4 x float> %a, <4 x float> undef | 279 %val = select <4 x i1> %cond, <4 x float> %a, <4 x float> undef |
280 ret <4 x float> %val | 280 ret <4 x float> %val |
281 ; CHECK-LABEL: vector_select_v4f32_arg2 | 281 ; CHECK-LABEL: vector_select_v4f32_arg2 |
282 ; CHECK: pxor | 282 ; CHECK: pxor |
283 } | 283 } |
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