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Side by Side Diff: src/x64/assembler-x64-inl.h

Issue 1162993006: Add support for Embedded Constant Pools for PPC and Arm (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 6 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_X64_ASSEMBLER_X64_INL_H_ 5 #ifndef V8_X64_ASSEMBLER_X64_INL_H_
6 #define V8_X64_ASSEMBLER_X64_INL_H_ 6 #define V8_X64_ASSEMBLER_X64_INL_H_
7 7
8 #include "src/x64/assembler-x64.h" 8 #include "src/x64/assembler-x64.h"
9 9
10 #include "src/base/cpu.h" 10 #include "src/base/cpu.h"
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260 260
261 void Assembler::emit_vex_prefix(Register reg, Register vreg, const Operand& rm, 261 void Assembler::emit_vex_prefix(Register reg, Register vreg, const Operand& rm,
262 VectorLength l, SIMDPrefix pp, LeadingOpcode mm, 262 VectorLength l, SIMDPrefix pp, LeadingOpcode mm,
263 VexW w) { 263 VexW w) {
264 XMMRegister ireg = {reg.code()}; 264 XMMRegister ireg = {reg.code()};
265 XMMRegister ivreg = {vreg.code()}; 265 XMMRegister ivreg = {vreg.code()};
266 emit_vex_prefix(ireg, ivreg, rm, l, pp, mm, w); 266 emit_vex_prefix(ireg, ivreg, rm, l, pp, mm, w);
267 } 267 }
268 268
269 269
270 Address Assembler::target_address_at(Address pc, 270 Address Assembler::target_address_at(Address pc, Address constant_pool) {
271 ConstantPoolArray* constant_pool) {
272 return Memory::int32_at(pc) + pc + 4; 271 return Memory::int32_at(pc) + pc + 4;
273 } 272 }
274 273
275 274
276 void Assembler::set_target_address_at(Address pc, 275 void Assembler::set_target_address_at(Address pc, Address constant_pool,
277 ConstantPoolArray* constant_pool,
278 Address target, 276 Address target,
279 ICacheFlushMode icache_flush_mode) { 277 ICacheFlushMode icache_flush_mode) {
280 Memory::int32_at(pc) = static_cast<int32_t>(target - pc - 4); 278 Memory::int32_at(pc) = static_cast<int32_t>(target - pc - 4);
281 if (icache_flush_mode != SKIP_ICACHE_FLUSH) { 279 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
282 CpuFeatures::FlushICache(pc, sizeof(int32_t)); 280 CpuFeatures::FlushICache(pc, sizeof(int32_t));
283 } 281 }
284 } 282 }
285 283
286 284
287 void Assembler::deserialization_set_target_internal_reference_at( 285 void Assembler::deserialization_set_target_internal_reference_at(
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663 661
664 void Operand::set_disp64(int64_t disp) { 662 void Operand::set_disp64(int64_t disp) {
665 DCHECK_EQ(1, len_); 663 DCHECK_EQ(1, len_);
666 int64_t* p = reinterpret_cast<int64_t*>(&buf_[len_]); 664 int64_t* p = reinterpret_cast<int64_t*>(&buf_[len_]);
667 *p = disp; 665 *p = disp;
668 len_ += sizeof(disp); 666 len_ += sizeof(disp);
669 } 667 }
670 } } // namespace v8::internal 668 } } // namespace v8::internal
671 669
672 #endif // V8_X64_ASSEMBLER_X64_INL_H_ 670 #endif // V8_X64_ASSEMBLER_X64_INL_H_
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