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1 // Copyright 2013 the V8 project authors. All rights reserved. | 1 // Copyright 2013 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_ARM64_ASSEMBLER_ARM64_INL_H_ | 5 #ifndef V8_ARM64_ASSEMBLER_ARM64_INL_H_ |
6 #define V8_ARM64_ASSEMBLER_ARM64_INL_H_ | 6 #define V8_ARM64_ASSEMBLER_ARM64_INL_H_ |
7 | 7 |
8 #include "src/arm64/assembler-arm64.h" | 8 #include "src/arm64/assembler-arm64.h" |
9 #include "src/assembler.h" | 9 #include "src/assembler.h" |
10 #include "src/debug.h" | 10 #include "src/debug.h" |
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579 | 579 |
580 | 580 |
581 Address Assembler::target_pointer_address_at(Address pc) { | 581 Address Assembler::target_pointer_address_at(Address pc) { |
582 Instruction* instr = reinterpret_cast<Instruction*>(pc); | 582 Instruction* instr = reinterpret_cast<Instruction*>(pc); |
583 DCHECK(instr->IsLdrLiteralX()); | 583 DCHECK(instr->IsLdrLiteralX()); |
584 return reinterpret_cast<Address>(instr->ImmPCOffsetTarget()); | 584 return reinterpret_cast<Address>(instr->ImmPCOffsetTarget()); |
585 } | 585 } |
586 | 586 |
587 | 587 |
588 // Read/Modify the code target address in the branch/call instruction at pc. | 588 // Read/Modify the code target address in the branch/call instruction at pc. |
589 Address Assembler::target_address_at(Address pc, | 589 Address Assembler::target_address_at(Address pc, Address constant_pool) { |
590 ConstantPoolArray* constant_pool) { | |
591 return Memory::Address_at(target_pointer_address_at(pc)); | 590 return Memory::Address_at(target_pointer_address_at(pc)); |
592 } | 591 } |
593 | 592 |
594 | 593 |
595 Address Assembler::target_address_at(Address pc, Code* code) { | 594 Address Assembler::target_address_at(Address pc, Code* code) { |
596 ConstantPoolArray* constant_pool = code ? code->constant_pool() : NULL; | 595 Address constant_pool = code ? code->constant_pool() : NULL; |
597 return target_address_at(pc, constant_pool); | 596 return target_address_at(pc, constant_pool); |
598 } | 597 } |
599 | 598 |
600 | 599 |
601 Address Assembler::target_address_from_return_address(Address pc) { | 600 Address Assembler::target_address_from_return_address(Address pc) { |
602 // Returns the address of the call target from the return address that will | 601 // Returns the address of the call target from the return address that will |
603 // be returned to after a call. | 602 // be returned to after a call. |
604 // Call sequence on ARM64 is: | 603 // Call sequence on ARM64 is: |
605 // ldr ip0, #... @ load from literal pool | 604 // ldr ip0, #... @ load from literal pool |
606 // blr ip0 | 605 // blr ip0 |
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658 Memory::Address_at(constant_pool_entry) = target; | 657 Memory::Address_at(constant_pool_entry) = target; |
659 } | 658 } |
660 | 659 |
661 | 660 |
662 void Assembler::deserialization_set_target_internal_reference_at( | 661 void Assembler::deserialization_set_target_internal_reference_at( |
663 Address pc, Address target, RelocInfo::Mode mode) { | 662 Address pc, Address target, RelocInfo::Mode mode) { |
664 Memory::Address_at(pc) = target; | 663 Memory::Address_at(pc) = target; |
665 } | 664 } |
666 | 665 |
667 | 666 |
668 void Assembler::set_target_address_at(Address pc, | 667 void Assembler::set_target_address_at(Address pc, Address constant_pool, |
669 ConstantPoolArray* constant_pool, | |
670 Address target, | 668 Address target, |
671 ICacheFlushMode icache_flush_mode) { | 669 ICacheFlushMode icache_flush_mode) { |
672 Memory::Address_at(target_pointer_address_at(pc)) = target; | 670 Memory::Address_at(target_pointer_address_at(pc)) = target; |
673 // Intuitively, we would think it is necessary to always flush the | 671 // Intuitively, we would think it is necessary to always flush the |
674 // instruction cache after patching a target address in the code as follows: | 672 // instruction cache after patching a target address in the code as follows: |
675 // CpuFeatures::FlushICache(pc, sizeof(target)); | 673 // CpuFeatures::FlushICache(pc, sizeof(target)); |
676 // However, on ARM, an instruction is actually patched in the case of | 674 // However, on ARM, an instruction is actually patched in the case of |
677 // embedded constants of the form: | 675 // embedded constants of the form: |
678 // ldr ip, [pc, #...] | 676 // ldr ip, [pc, #...] |
679 // since the instruction accessing this address in the constant pool remains | 677 // since the instruction accessing this address in the constant pool remains |
680 // unchanged, a flush is not required. | 678 // unchanged, a flush is not required. |
681 } | 679 } |
682 | 680 |
683 | 681 |
684 void Assembler::set_target_address_at(Address pc, | 682 void Assembler::set_target_address_at(Address pc, |
685 Code* code, | 683 Code* code, |
686 Address target, | 684 Address target, |
687 ICacheFlushMode icache_flush_mode) { | 685 ICacheFlushMode icache_flush_mode) { |
688 ConstantPoolArray* constant_pool = code ? code->constant_pool() : NULL; | 686 Address constant_pool = code ? code->constant_pool() : NULL; |
689 set_target_address_at(pc, constant_pool, target, icache_flush_mode); | 687 set_target_address_at(pc, constant_pool, target, icache_flush_mode); |
690 } | 688 } |
691 | 689 |
692 | 690 |
693 int RelocInfo::target_address_size() { | 691 int RelocInfo::target_address_size() { |
694 return kPointerSize; | 692 return kPointerSize; |
695 } | 693 } |
696 | 694 |
697 | 695 |
698 Address RelocInfo::target_address() { | 696 Address RelocInfo::target_address() { |
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1294 | 1292 |
1295 | 1293 |
1296 void Assembler::ClearRecordedAstId() { | 1294 void Assembler::ClearRecordedAstId() { |
1297 recorded_ast_id_ = TypeFeedbackId::None(); | 1295 recorded_ast_id_ = TypeFeedbackId::None(); |
1298 } | 1296 } |
1299 | 1297 |
1300 | 1298 |
1301 } } // namespace v8::internal | 1299 } } // namespace v8::internal |
1302 | 1300 |
1303 #endif // V8_ARM64_ASSEMBLER_ARM64_INL_H_ | 1301 #endif // V8_ARM64_ASSEMBLER_ARM64_INL_H_ |
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