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Side by Side Diff: test/unittests/compiler/arm64/instruction-selector-arm64-unittest.cc

Issue 1161643003: [arm64] Use ubfiz in ARM64 instruction selector (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 6 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "test/unittests/compiler/instruction-selector-unittest.h" 5 #include "test/unittests/compiler/instruction-selector-unittest.h"
6 6
7 namespace v8 { 7 namespace v8 {
8 namespace internal { 8 namespace internal {
9 namespace compiler { 9 namespace compiler {
10 10
(...skipping 2411 matching lines...) Expand 10 before | Expand all | Expand 10 after
2422 ASSERT_EQ(1U, s.size()); 2422 ASSERT_EQ(1U, s.size());
2423 EXPECT_EQ(kArm64Ubfx32, s[0]->arch_opcode()); 2423 EXPECT_EQ(kArm64Ubfx32, s[0]->arch_opcode());
2424 ASSERT_EQ(3U, s[0]->InputCount()); 2424 ASSERT_EQ(3U, s[0]->InputCount());
2425 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0))); 2425 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
2426 ASSERT_EQ(1U, s[0]->OutputCount()); 2426 ASSERT_EQ(1U, s[0]->OutputCount());
2427 EXPECT_EQ(s.ToVreg(r), s.ToVreg(s[0]->Output())); 2427 EXPECT_EQ(s.ToVreg(r), s.ToVreg(s[0]->Output()));
2428 } 2428 }
2429 } 2429 }
2430 2430
2431 2431
2432 TEST_F(InstructionSelectorTest, Word32ShlWithWord32And) {
2433 TRACED_FORRANGE(int32_t, shift, 1, 30) {
2434 StreamBuilder m(this, kMachInt32, kMachInt32);
2435 Node* const p0 = m.Parameter(0);
2436 Node* const r =
2437 m.Word32Shl(m.Word32And(p0, m.Int32Constant((1 << (31 - shift)) - 1)),
2438 m.Int32Constant(shift));
2439 m.Return(r);
2440 Stream s = m.Build();
2441 ASSERT_EQ(1U, s.size());
2442 EXPECT_EQ(kArm64Ubfiz32, s[0]->arch_opcode());
2443 ASSERT_EQ(3U, s[0]->InputCount());
2444 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
2445 ASSERT_EQ(1U, s[0]->OutputCount());
2446 EXPECT_EQ(s.ToVreg(r), s.ToVreg(s[0]->Output()));
2447 }
2448 TRACED_FORRANGE(int32_t, shift, 0, 30) {
2449 StreamBuilder m(this, kMachInt32, kMachInt32);
2450 Node* const p0 = m.Parameter(0);
2451 Node* const r =
2452 m.Word32Shl(m.Word32And(p0, m.Int32Constant((1 << (31 - shift)) - 1)),
2453 m.Int32Constant(shift + 1));
2454 m.Return(r);
2455 Stream s = m.Build();
2456 ASSERT_EQ(1U, s.size());
2457 EXPECT_EQ(kArm64Lsl32, s[0]->arch_opcode());
2458 ASSERT_EQ(2U, s[0]->InputCount());
2459 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
2460 ASSERT_EQ(1U, s[0]->OutputCount());
2461 EXPECT_EQ(s.ToVreg(r), s.ToVreg(s[0]->Output()));
2462 }
2463 }
2464
2465
2432 TEST_F(InstructionSelectorTest, Word32Clz) { 2466 TEST_F(InstructionSelectorTest, Word32Clz) {
2433 StreamBuilder m(this, kMachUint32, kMachUint32); 2467 StreamBuilder m(this, kMachUint32, kMachUint32);
2434 Node* const p0 = m.Parameter(0); 2468 Node* const p0 = m.Parameter(0);
2435 Node* const n = m.Word32Clz(p0); 2469 Node* const n = m.Word32Clz(p0);
2436 m.Return(n); 2470 m.Return(n);
2437 Stream s = m.Build(); 2471 Stream s = m.Build();
2438 ASSERT_EQ(1U, s.size()); 2472 ASSERT_EQ(1U, s.size());
2439 EXPECT_EQ(kArm64Clz32, s[0]->arch_opcode()); 2473 EXPECT_EQ(kArm64Clz32, s[0]->arch_opcode());
2440 ASSERT_EQ(1U, s[0]->InputCount()); 2474 ASSERT_EQ(1U, s[0]->InputCount());
2441 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0))); 2475 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
(...skipping 42 matching lines...) Expand 10 before | Expand all | Expand 10 after
2484 EXPECT_EQ(kArm64Float64Neg, s[0]->arch_opcode()); 2518 EXPECT_EQ(kArm64Float64Neg, s[0]->arch_opcode());
2485 ASSERT_EQ(1U, s[0]->InputCount()); 2519 ASSERT_EQ(1U, s[0]->InputCount());
2486 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0))); 2520 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
2487 ASSERT_EQ(1U, s[0]->OutputCount()); 2521 ASSERT_EQ(1U, s[0]->OutputCount());
2488 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output())); 2522 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
2489 } 2523 }
2490 2524
2491 } // namespace compiler 2525 } // namespace compiler
2492 } // namespace internal 2526 } // namespace internal
2493 } // namespace v8 2527 } // namespace v8
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