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Side by Side Diff: tests_lit/llvm2ice_tests/load.ll

Issue 1161543005: Subzero: Changes needed for LLVM 3.7 integration. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 5 years, 6 months ago
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1 ; Simple test of the load instruction. 1 ; Simple test of the load instruction.
2 2
3 ; REQUIRES: allow_dump 3 ; REQUIRES: allow_dump
4 4
5 ; RUN: %p2i -i %s --args --verbose inst -threads=0 | FileCheck %s 5 ; RUN: %p2i -i %s --args --verbose inst -threads=0 | FileCheck %s
6 6
7 define void @load_i64(i32 %addr_arg) { 7 define void @load_i64(i32 %addr_arg) {
8 entry: 8 entry:
9 %__1 = inttoptr i32 %addr_arg to i64* 9 %__1 = inttoptr i32 %addr_arg to i64*
10 %iv = load i64* %__1, align 1 10 %iv = load i64, i64* %__1, align 1
11 ret void 11 ret void
12 12
13 ; CHECK: Initial CFG 13 ; CHECK: Initial CFG
14 ; CHECK: entry: 14 ; CHECK: entry:
15 ; CHECK-NEXT: %iv = load i64* %addr_arg, align 1 15 ; CHECK-NEXT: %iv = load i64, i64* %addr_arg, align 1
16 ; CHECK-NEXT: ret void 16 ; CHECK-NEXT: ret void
17 } 17 }
18 18
19 define void @load_i32(i32 %addr_arg) { 19 define void @load_i32(i32 %addr_arg) {
20 entry: 20 entry:
21 %__1 = inttoptr i32 %addr_arg to i32* 21 %__1 = inttoptr i32 %addr_arg to i32*
22 %iv = load i32* %__1, align 1 22 %iv = load i32, i32* %__1, align 1
23 ret void 23 ret void
24 24
25 ; CHECK: Initial CFG 25 ; CHECK: Initial CFG
26 ; CHECK: entry: 26 ; CHECK: entry:
27 ; CHECK-NEXT: %iv = load i32* %addr_arg, align 1 27 ; CHECK-NEXT: %iv = load i32, i32* %addr_arg, align 1
28 ; CHECK-NEXT: ret void 28 ; CHECK-NEXT: ret void
29 } 29 }
30 30
31 define void @load_i16(i32 %addr_arg) { 31 define void @load_i16(i32 %addr_arg) {
32 entry: 32 entry:
33 %__1 = inttoptr i32 %addr_arg to i16* 33 %__1 = inttoptr i32 %addr_arg to i16*
34 %iv = load i16* %__1, align 1 34 %iv = load i16, i16* %__1, align 1
35 ret void 35 ret void
36 36
37 ; CHECK: Initial CFG 37 ; CHECK: Initial CFG
38 ; CHECK: entry: 38 ; CHECK: entry:
39 ; CHECK-NEXT: %iv = load i16* %addr_arg, align 1 39 ; CHECK-NEXT: %iv = load i16, i16* %addr_arg, align 1
40 ; CHECK-NEXT: ret void 40 ; CHECK-NEXT: ret void
41 } 41 }
42 42
43 define void @load_i8(i32 %addr_arg) { 43 define void @load_i8(i32 %addr_arg) {
44 entry: 44 entry:
45 %__1 = inttoptr i32 %addr_arg to i8* 45 %__1 = inttoptr i32 %addr_arg to i8*
46 %iv = load i8* %__1, align 1 46 %iv = load i8, i8* %__1, align 1
47 ret void 47 ret void
48 48
49 ; CHECK: Initial CFG 49 ; CHECK: Initial CFG
50 ; CHECK: entry: 50 ; CHECK: entry:
51 ; CHECK-NEXT: %iv = load i8* %addr_arg, align 1 51 ; CHECK-NEXT: %iv = load i8, i8* %addr_arg, align 1
52 ; CHECK-NEXT: ret void 52 ; CHECK-NEXT: ret void
53 } 53 }
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