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Issue 1160093002: [arm] Fix vmov immediate for ARMv6. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 6 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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2589 DoubleAsTwoUInt32(imm, &lo, &hi); 2589 DoubleAsTwoUInt32(imm, &lo, &hi);
2590 2590
2591 if (lo == hi) { 2591 if (lo == hi) {
2592 // Move the low and high parts of the double to a D register in one 2592 // Move the low and high parts of the double to a D register in one
2593 // instruction. 2593 // instruction.
2594 mov(ip, Operand(lo)); 2594 mov(ip, Operand(lo));
2595 vmov(dst, ip, ip); 2595 vmov(dst, ip, ip);
2596 } else if (scratch.is(no_reg)) { 2596 } else if (scratch.is(no_reg)) {
2597 mov(ip, Operand(lo)); 2597 mov(ip, Operand(lo));
2598 vmov(dst, VmovIndexLo, ip); 2598 vmov(dst, VmovIndexLo, ip);
2599 if ((lo & 0xffff) == (hi & 0xffff)) { 2599 if (((lo & 0xffff) == (hi & 0xffff)) &&
2600 CpuFeatures::IsSupported(ARMv7)) {
2600 movt(ip, hi >> 16); 2601 movt(ip, hi >> 16);
2601 } else { 2602 } else {
2602 mov(ip, Operand(hi)); 2603 mov(ip, Operand(hi));
2603 } 2604 }
2604 vmov(dst, VmovIndexHi, ip); 2605 vmov(dst, VmovIndexHi, ip);
2605 } else { 2606 } else {
2606 // Move the low and high parts of the double to a D register in one 2607 // Move the low and high parts of the double to a D register in one
2607 // instruction. 2608 // instruction.
2608 mov(ip, Operand(lo)); 2609 mov(ip, Operand(lo));
2609 mov(scratch, Operand(hi)); 2610 mov(scratch, Operand(hi));
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4112 assm->instr_at_put( 4113 assm->instr_at_put(
4113 rinfo.pc(), Assembler::SetLdrRegisterImmediateOffset(instr, offset)); 4114 rinfo.pc(), Assembler::SetLdrRegisterImmediateOffset(instr, offset));
4114 } 4115 }
4115 } 4116 }
4116 } 4117 }
4117 4118
4118 4119
4119 } } // namespace v8::internal 4120 } } // namespace v8::internal
4120 4121
4121 #endif // V8_TARGET_ARCH_ARM 4122 #endif // V8_TARGET_ARCH_ARM
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