Chromium Code Reviews| Index: src/assembler_mips32.h |
| diff --git a/src/assembler_arm32.h b/src/assembler_mips32.h |
| similarity index 53% |
| copy from src/assembler_arm32.h |
| copy to src/assembler_mips32.h |
| index 54eadec1bab35509c4d43ebe87a646580a7a78d1..da90fe9afefcb550d9275fe69a1de13885b9d665 100644 |
| --- a/src/assembler_arm32.h |
| +++ b/src/assembler_mips32.h |
| @@ -1,4 +1,4 @@ |
| -//===- subzero/src/assembler_arm32.h - Assembler for ARM32 ------*- C++ -*-===// |
| +//===- subzero/src/assembler_mips.h - Assembler for MIPS ------*- C++ -*-===// |
|
Jim Stichnoth
2015/05/30 00:47:15
add an extra '--' to pad // to end of line
|
| // |
| // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| // for details. All rights reserved. Use of this source code is governed by a |
| @@ -15,12 +15,12 @@ |
| // |
| //===----------------------------------------------------------------------===// |
| // |
| -// This file implements the Assembler class for ARM32. |
| +// This file implements the Assembler class for MIPS32. |
| // |
| //===----------------------------------------------------------------------===// |
| -#ifndef SUBZERO_SRC_ASSEMBLER_ARM32_H |
| -#define SUBZERO_SRC_ASSEMBLER_ARM32_H |
| +#ifndef SUBZERO_SRC_ASSEMBLER_MIPS32_H |
| +#define SUBZERO_SRC_ASSEMBLER_MIPS32_H |
| #include "IceDefs.h" |
| #include "IceFixups.h" |
| @@ -28,50 +28,49 @@ |
| #include "assembler.h" |
| namespace Ice { |
| -namespace ARM32 { |
| +namespace MIPS32 { |
| -class AssemblerARM32 : public Assembler { |
| - AssemblerARM32(const AssemblerARM32 &) = delete; |
| - AssemblerARM32 &operator=(const AssemblerARM32 &) = delete; |
| +class AssemblerMIPS32 : public Assembler { |
| + AssemblerMIPS32(const AssemblerMIPS32 &) = delete; |
| + AssemblerMIPS32 &operator=(const AssemblerMIPS32 &) = delete; |
| public: |
| - explicit AssemblerARM32(bool use_far_branches = false) : Assembler() { |
| - // This mode is only needed and implemented for MIPS and ARM. |
| + explicit AssemblerMIPS32(bool use_far_branches = false) : Assembler() { |
| + // This mode is only needed and implemented for MIPS32 and ARM. |
| assert(!use_far_branches); |
| (void)use_far_branches; |
| } |
| - ~AssemblerARM32() override = default; |
| + ~AssemblerMIPS32() override = default; |
| - void alignFunction() override { llvm_unreachable("Not yet implemented."); } |
| + void alignFunction() override { |
| + llvm::report_fatal_error("Not yet implemented."); |
| + } |
| SizeT getBundleAlignLog2Bytes() const override { return 4; } |
| - const char *getNonExecPadDirective() const override { return ".p2alignl"; } |
| + const char *getNonExecPadDirective() const override { return ".TBD"; } |
| llvm::ArrayRef<uint8_t> getNonExecBundlePadding() const override { |
| - // Use a particular UDF encoding -- TRAPNaCl in LLVM: 0xE7FEDEF0 |
| - // http://llvm.org/viewvc/llvm-project?view=revision&revision=173943 |
| - static const uint8_t Padding[] = {0xE7, 0xFE, 0xDE, 0xF0}; |
| - return llvm::ArrayRef<uint8_t>(Padding, 4); |
| + llvm::report_fatal_error("Not yet implemented."); |
| } |
| void padWithNop(intptr_t Padding) override { |
| (void)Padding; |
| - llvm_unreachable("Not yet implemented."); |
| + llvm::report_fatal_error("Not yet implemented."); |
| } |
| void BindCfgNodeLabel(SizeT NodeNumber) override { |
| (void)NodeNumber; |
| - llvm_unreachable("Not yet implemented."); |
| + llvm::report_fatal_error("Not yet implemented."); |
| } |
| bool fixupIsPCRel(FixupKind Kind) const override { |
| (void)Kind; |
| - llvm_unreachable("Not yet implemented."); |
| + llvm::report_fatal_error("Not yet implemented."); |
| } |
| }; |
| -} // end of namespace ARM32 |
| +} // end of namespace MIPS32 |
| } // end of namespace Ice |
| -#endif // SUBZERO_SRC_ASSEMBLER_ARM32_H |
| +#endif // SUBZERO_SRC_ASSEMBLER_MIPS32_H |