First patch for Mips subzero compiler

src/IceRegistersMIPS32.h

-//===- subzero/src/IceRegistersARM32.h - Register information ---*- C++ -*-===//
+//===- subzero/src/IceRegistersMIPS32.h - Register information ---*- C++ -*-===//

[Jim Stichnoth, 2015/05/30 00:47:14]

remove a '-' to maintain 80-col

 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
-// This file declares the registers and their encodings for ARM32.
+// This file declares the registers and their encodings for MIPS32.
 //
 //===----------------------------------------------------------------------===//
 
-#ifndef SUBZERO_SRC_ICEREGISTERSARM32_H
-#define SUBZERO_SRC_ICEREGISTERSARM32_H
+#ifndef SUBZERO_SRC_ICEREGISTERSMIPS32_H
+#define SUBZERO_SRC_ICEREGISTERSMIPS32_H
 
 #include "IceDefs.h"
-#include "IceInstARM32.def"
+#include "IceInstMIPS32.def"
 #include "IceTypes.h"
 
 namespace Ice {
 
-namespace RegARM32 {
+namespace RegMIPS32 {
 
 // An enum of every register. The enum value may not match the encoding
 // used to binary encode register operands in instructions.
 enum AllRegisters {
 #define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt,    \
           isFP)                                                                \
   val,
-  REGARM32_TABLE
+  REGMIPS32_TABLE
 #undef X
       Reg_NUM,
 #define X(val, init) val init,
-  REGARM32_TABLE_BOUNDS
+  REGMIPS32_TABLE_BOUNDS
 #undef X
 };
 
 // An enum of GPR Registers. The enum value does match the encoding used
 // to binary encode register operands in instructions.
 enum GPRRegister {
 #define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt,    \
           isFP)                                                                \
   Encoded_##val encode,
-  REGARM32_GPR_TABLE
+  REGMIPS32_GPR_TABLE
 #undef X
       Encoded_Not_GPR = -1
 };
 
 // TODO(jvoung): Floating point and vector registers...
 // Need to model overlap and difference in encoding too.
 
 static inline GPRRegister getEncodedGPR(int32_t RegNum) {
   assert(Reg_GPR_First <= RegNum && RegNum <= Reg_GPR_Last);
   return GPRRegister(RegNum - Reg_GPR_First);
 }
 
-} // end of namespace RegARM32
+} // end of namespace RegMIPS32
 
 } // end of namespace Ice
 
-#endif // SUBZERO_SRC_ICEREGISTERSARM32_H
+#endif // SUBZERO_SRC_ICEREGISTERSMIPS32_H