Subzero ARM: addProlog/addEpilogue -- share some code with x86.

src/IceTargetLoweringARM32.h

Index: src/IceTargetLoweringARM32.h
diff --git a/src/IceTargetLoweringARM32.h b/src/IceTargetLoweringARM32.h
index 019a3e0831cf37276cc40bb8ed1f0025c86af44e..e3f8647f6799598e6c8336864b6bf72bfbe23f75 100644
--- a/src/IceTargetLoweringARM32.h
+++ b/src/IceTargetLoweringARM32.h
@@ -52,6 +52,9 @@ public:
     // i8, and i16 are rounded up to 4 bytes.
     return (typeWidthInBytes(Ty) + 3) & ~3;
   }
+  size_t minStackSlotSizeLog2() const final { return 2; }
+  size_t maxStackSlotSizeLog2() const final { return 4; }
+
   void emitVariable(const Variable *Var) const override;
 
   const char *getConstantPrefix() const final { return "#"; }
@@ -71,6 +74,8 @@ public:
   void split64(Variable *Var);
   Operand *loOperand(Operand *Operand);
   Operand *hiOperand(Operand *Operand);
+  void finishArgumentLowering(Variable *Arg, Variable *FramePtr,
+                              size_t BasicFrameOffset, size_t &InArgsSizeBytes);
 
 protected:
   explicit TargetARM32(Cfg *Func);
@@ -219,6 +224,17 @@ protected:
             CondARM32::Cond Pred = CondARM32::AL) {
     Context.insert(InstARM32Orr::create(Func, Dest, Src0, Src1, Pred));
   }
+  void _push(const VarList &Sources) {
+    Context.insert(InstARM32Push::create(Func, Sources));
+  }
+  void _pop(const VarList &Dests) {
+    Variable *First = Dests[0];
+    Context.insert(InstARM32Pop::create(Func, Dests));
+    // Mark other dests as modified.
+    for (size_t I = 1; I < Dests.size(); ++I) {
+      Context.insert(InstFakeDef::create(Func, Dests[I], First));
+    }
+  }
   void _sbc(Variable *Dest, Variable *Src0, Operand *Src1,
             CondARM32::Cond Pred = CondARM32::AL) {
     Context.insert(InstARM32Sbc::create(Func, Dest, Src0, Src1, Pred));
@@ -253,6 +269,8 @@ protected:
 
   bool UsesFramePointer;
   bool NeedsStackAlignment;
+  bool IsLeafFunction;
+  size_t SpillAreaSizeBytes;
   llvm::SmallBitVector TypeToRegisterSet[IceType_NUM];
   llvm::SmallBitVector ScratchRegs;
   llvm::SmallBitVector RegsUsed;