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1 ; This is a basic test of the alloca instruction. | 1 ; This is a basic test of the alloca instruction. |
2 | 2 |
3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ | 3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ |
4 ; RUN: --target x8632 -i %s --args -O2 \ | 4 ; RUN: --target x8632 -i %s --args -O2 \ |
5 ; RUN: | %if --need=target_X8632 --command FileCheck %s | 5 ; RUN: | %if --need=target_X8632 --command FileCheck %s |
6 | 6 |
7 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ | 7 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ |
8 ; RUN: --target x8632 -i %s --args -Om1 \ | 8 ; RUN: --target x8632 -i %s --args -Om1 \ |
9 ; RUN: | %if --need=target_X8632 --command FileCheck %s | 9 ; RUN: | %if --need=target_X8632 --command FileCheck %s |
10 | 10 |
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120 | 120 |
121 define void @variable_n_align_32(i32 %n) { | 121 define void @variable_n_align_32(i32 %n) { |
122 entry: | 122 entry: |
123 %array = alloca i8, i32 %n, align 32 | 123 %array = alloca i8, i32 %n, align 32 |
124 %__2 = ptrtoint i8* %array to i32 | 124 %__2 = ptrtoint i8* %array to i32 |
125 call void @f2(i32 %__2) | 125 call void @f2(i32 %__2) |
126 ret void | 126 ret void |
127 } | 127 } |
128 ; In -O2, the order of the CHECK-DAG lines in the output is switched. | 128 ; In -O2, the order of the CHECK-DAG lines in the output is switched. |
129 ; CHECK-LABEL: variable_n_align_32 | 129 ; CHECK-LABEL: variable_n_align_32 |
| 130 ; CHECK: push ebp |
| 131 ; CHECK: mov ebp,esp |
130 ; CHECK-DAG: and esp,0xffffffe0 | 132 ; CHECK-DAG: and esp,0xffffffe0 |
131 ; CHECK-DAG: mov eax,DWORD PTR [ebp+0x8] | 133 ; CHECK-DAG: mov eax,DWORD PTR [ebp+0x8] |
132 ; CHECK: add eax,0x1f | 134 ; CHECK: add eax,0x1f |
133 ; CHECK: and eax,0xffffffe0 | 135 ; CHECK: and eax,0xffffffe0 |
134 ; CHECK: sub esp,eax | 136 ; CHECK: sub esp,eax |
135 ; CHECK: sub esp,0x10 | 137 ; CHECK: sub esp,0x10 |
136 ; CHECK: mov DWORD PTR [esp],eax | 138 ; CHECK: mov DWORD PTR [esp],eax |
137 ; CHECK: call {{.*}} R_{{.*}} f2 | 139 ; CHECK: call {{.*}} R_{{.*}} f2 |
| 140 ; CHECK: mov esp,ebp |
| 141 ; CHECK: pop ebp |
138 | 142 |
139 ; ARM32-LABEL: variable_n_align_32 | 143 ; ARM32-LABEL: variable_n_align_32 |
| 144 ; ARM32: push {fp, lr} |
| 145 ; ARM32: mov fp, sp |
140 ; ARM32: bic sp, sp, #31 | 146 ; ARM32: bic sp, sp, #31 |
141 ; ARM32: add r0, r0, #31 | 147 ; ARM32: add r0, r0, #31 |
142 ; ARM32: bic r0, r0, #31 | 148 ; ARM32: bic r0, r0, #31 |
143 ; ARM32: sub sp, sp, r0 | 149 ; ARM32: sub sp, sp, r0 |
144 ; ARM32: bl {{.*}} R_{{.*}} f2 | 150 ; ARM32: bl {{.*}} R_{{.*}} f2 |
| 151 ; ARM32: mov sp, fp |
| 152 ; ARM32: pop {fp, lr} |
145 | 153 |
146 ; Test alloca with default (0) alignment. | 154 ; Test alloca with default (0) alignment. |
147 define void @align0(i32 %n) { | 155 define void @align0(i32 %n) { |
148 entry: | 156 entry: |
149 %array = alloca i8, i32 %n | 157 %array = alloca i8, i32 %n |
150 %__2 = ptrtoint i8* %array to i32 | 158 %__2 = ptrtoint i8* %array to i32 |
151 call void @f2(i32 %__2) | 159 call void @f2(i32 %__2) |
152 ret void | 160 ret void |
153 } | 161 } |
154 ; CHECK-LABEL: align0 | 162 ; CHECK-LABEL: align0 |
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202 ; CHECK: add [[REG:.*]],0x1fffffff | 210 ; CHECK: add [[REG:.*]],0x1fffffff |
203 ; CHECK: and [[REG]],0xe0000000 | 211 ; CHECK: and [[REG]],0xe0000000 |
204 ; CHECK: sub esp,[[REG]] | 212 ; CHECK: sub esp,[[REG]] |
205 | 213 |
206 ; ARM32-LABEL: align512MB | 214 ; ARM32-LABEL: align512MB |
207 ; ARM32: and sp, sp, #-536870912 ; 0xe0000000 | 215 ; ARM32: and sp, sp, #-536870912 ; 0xe0000000 |
208 ; ARM32: mvn [[REG:.*]], #-536870912 ; 0xe0000000 | 216 ; ARM32: mvn [[REG:.*]], #-536870912 ; 0xe0000000 |
209 ; ARM32: add r0, r0, [[REG]] | 217 ; ARM32: add r0, r0, [[REG]] |
210 ; ARM32: and r0, r0, #-536870912 ; 0xe0000000 | 218 ; ARM32: and r0, r0, #-536870912 ; 0xe0000000 |
211 ; ARM32: sub sp, sp, r0 | 219 ; ARM32: sub sp, sp, r0 |
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