Use direct jump and call instruction for X64 when the deoptimization entries are in the code range

src/mips/assembler-mips-inl.h

 
 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
@@ skipping 213 matching lines @@
 }
 
 
 Address* RelocInfo::target_reference_address() {
   ASSERT(rmode_ == EXTERNAL_REFERENCE);
   reconstructed_adr_ptr_ = Assembler::target_address_at(pc_);
   return &reconstructed_adr_ptr_;
 }
 
 
+Address RelocInfo::target_runtime_entry(Assembler* origin, intptr_t delta) {
+  ASSERT(IsRuntimeEntry(rmode_));
+  return target_address();
+}
+
+
+void RelocInfo::set_target_runtime_entry(Address target,
+                                         WriteBarrierMode mode) {
+  ASSERT(IsRuntimeEntry(rmode_));
+  if (target_address() != target) set_target_address(target, mode);
+}
+
+
 Handle<JSGlobalPropertyCell> RelocInfo::target_cell_handle() {
   ASSERT(rmode_ == RelocInfo::GLOBAL_PROPERTY_CELL);
   Address address = Memory::Address_at(pc_);
   return Handle<JSGlobalPropertyCell>(
       reinterpret_cast<JSGlobalPropertyCell**>(address));
 }
 
 
 JSGlobalPropertyCell* RelocInfo::target_cell() {
   ASSERT(rmode_ == RelocInfo::GLOBAL_PROPERTY_CELL);
@@ skipping 172 matching lines @@
   }
   *reinterpret_cast<Instr*>(pc_) = x;
   pc_ += kInstrSize;
   CheckTrampolinePoolQuick();
 }
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_MIPS_ASSEMBLER_MIPS_INL_H_