MIPS: ARM: fix a bug with saving lr register in GenerateSmiToDouble.

src/mips/codegen-mips.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 228 matching lines @@
   if (!fpu_supported) __ Push(a1, a0);
 
   __ Branch(&entry);
 
   __ bind(&only_change_map);
   __ sw(a3, FieldMemOperand(a2, HeapObject::kMapOffset));
   __ RecordWriteField(a2,
                       HeapObject::kMapOffset,
                       a3,
                       t5,
-                      kRAHasBeenSaved,
+                      kRAHasNotBeenSaved,
                       kDontSaveFPRegs,
                       OMIT_REMEMBERED_SET,
                       OMIT_SMI_CHECK);
   __ Branch(&done);
 
   // Call into runtime if GC is required.
   __ bind(&gc_required);
   __ pop(ra);
   __ Branch(fail);
 
@@ skipping 400 matching lines @@
     patcher.masm()->dd(reinterpret_cast<uint32_t>(stub->instruction_start()));
   }
 }
 
 
 #undef __
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_MIPS