Index: src/IceTargetLoweringARM32.h |
diff --git a/src/IceTargetLoweringARM32.h b/src/IceTargetLoweringARM32.h |
index 04d5984dec28d22cb73814a3bf5742e4653bd0b6..019a3e0831cf37276cc40bb8ed1f0025c86af44e 100644 |
--- a/src/IceTargetLoweringARM32.h |
+++ b/src/IceTargetLoweringARM32.h |
@@ -118,6 +118,7 @@ protected: |
Variable *makeReg(Type Ty, int32_t RegNum = Variable::NoRegister); |
static Type stackSlotType(); |
Variable *copyToReg(Operand *Src, int32_t RegNum = Variable::NoRegister); |
+ void alignRegisterPow2(Variable *Reg, uint32_t Align); |
// Returns a vector in a register with the given constant entries. |
Variable *makeVectorOfZeros(Type Ty, int32_t RegNum = Variable::NoRegister); |
@@ -148,6 +149,10 @@ protected: |
CondARM32::Cond Pred = CondARM32::AL) { |
Context.insert(InstARM32And::create(Func, Dest, Src0, Src1, Pred)); |
} |
+ void _bic(Variable *Dest, Variable *Src0, Operand *Src1, |
+ CondARM32::Cond Pred = CondARM32::AL) { |
+ Context.insert(InstARM32Bic::create(Func, Dest, Src0, Src1, Pred)); |
+ } |
void _br(CondARM32::Cond Condition, CfgNode *TargetTrue, |
CfgNode *TargetFalse) { |
Context.insert( |