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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #include "vm/flow_graph_allocator.h" | 5 #include "vm/flow_graph_allocator.h" |
6 | 6 |
7 #include "vm/bit_vector.h" | 7 #include "vm/bit_vector.h" |
8 #include "vm/intermediate_language.h" | 8 #include "vm/intermediate_language.h" |
9 #include "vm/il_printer.h" | 9 #include "vm/il_printer.h" |
10 #include "vm/flow_graph.h" | 10 #include "vm/flow_graph.h" |
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111 blocked_cpu_registers_[TMP] = true; | 111 blocked_cpu_registers_[TMP] = true; |
112 } | 112 } |
113 if (TMP2 != kNoRegister) { | 113 if (TMP2 != kNoRegister) { |
114 blocked_cpu_registers_[TMP2] = true; | 114 blocked_cpu_registers_[TMP2] = true; |
115 } | 115 } |
116 if (PP != kNoRegister) { | 116 if (PP != kNoRegister) { |
117 blocked_cpu_registers_[PP] = true; | 117 blocked_cpu_registers_[PP] = true; |
118 } | 118 } |
119 blocked_cpu_registers_[SPREG] = true; | 119 blocked_cpu_registers_[SPREG] = true; |
120 blocked_cpu_registers_[FPREG] = true; | 120 blocked_cpu_registers_[FPREG] = true; |
| 121 blocked_cpu_registers_[THR] = true; |
121 | 122 |
122 // FpuTMP is used as scratch by optimized code and parallel move resolver. | 123 // FpuTMP is used as scratch by optimized code and parallel move resolver. |
123 blocked_fpu_registers_[FpuTMP] = true; | 124 blocked_fpu_registers_[FpuTMP] = true; |
124 | 125 |
125 // Block additional registers needed preserved when generating intrinsics. | 126 // Block additional registers needed preserved when generating intrinsics. |
126 // TODO(fschneider): Handle saving and restoring these registers when | 127 // TODO(fschneider): Handle saving and restoring these registers when |
127 // generating intrinsic code. | 128 // generating intrinsic code. |
128 if (intrinsic_mode) { | 129 if (intrinsic_mode) { |
129 blocked_cpu_registers_[ARGS_DESC_REG] = true; | 130 blocked_cpu_registers_[ARGS_DESC_REG] = true; |
130 } | 131 } |
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2970 ISL_Print("-- [after ssa allocator] ir [%s] -------------\n", | 2971 ISL_Print("-- [after ssa allocator] ir [%s] -------------\n", |
2971 function.ToFullyQualifiedCString()); | 2972 function.ToFullyQualifiedCString()); |
2972 FlowGraphPrinter printer(flow_graph_, true); | 2973 FlowGraphPrinter printer(flow_graph_, true); |
2973 printer.PrintBlocks(); | 2974 printer.PrintBlocks(); |
2974 ISL_Print("----------------------------------------------\n"); | 2975 ISL_Print("----------------------------------------------\n"); |
2975 } | 2976 } |
2976 } | 2977 } |
2977 | 2978 |
2978 | 2979 |
2979 } // namespace dart | 2980 } // namespace dart |
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