- Determine whether the simulator is being used in globals.h

runtime/vm/cpu_arm.cc

 // Copyright (c) 2012, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/assembler.h"
 #include "vm/cpu.h"
 #include "vm/cpuinfo.h"
 #include "vm/heap.h"
 #include "vm/isolate.h"
 #include "vm/object.h"
 #include "vm/simulator.h"
 
-#if defined(HOST_ARCH_ARM)
+#if !defined(USING_SIMULATOR)
 #include <sys/syscall.h>  /* NOLINT */
 #include <unistd.h>  /* NOLINT */
 #endif
 
 // ARM version differences.
 // We support three major 32-bit ARM ISA versions: ARMv5TE, ARMv6 and variants,
 // and ARMv7 and variants. For each of these we detect the presence of vfp,
 // neon, and integer division instructions. Considering ARMv5TE as the baseline,
 // later versions add the following features/instructions that we use:
 //
@@ skipping 35 matching lines @@
 DEFINE_FLAG(bool, use_neon, false, "Use neon instructions if supported");
 DEFINE_FLAG(bool, use_integer_division, false,
             "Use integer division instruction if supported");
 #else
 DEFINE_FLAG(bool, use_vfp, true, "Use vfp instructions if supported");
 DEFINE_FLAG(bool, use_neon, true, "Use neon instructions if supported");
 DEFINE_FLAG(bool, use_integer_division, true,
             "Use integer division instruction if supported");
 #endif
 
-#if !defined(HOST_ARCH_ARM)
+#if defined(USING_SIMULATOR)
 #if defined(TARGET_ARCH_ARM_5TE)
 DEFINE_FLAG(bool, sim_use_hardfp, false, "Use the softfp ABI.");
 #else
 DEFINE_FLAG(bool, sim_use_hardfp, true, "Use the softfp ABI.");
 #endif
 #endif
 
 void CPU::FlushICache(uword start, uword size) {
-#if defined(HOST_ARCH_ARM)
+#if !defined(USING_SIMULATOR)
   // Nothing to do. Flushing no instructions.
   if (size == 0) {
     return;
   }
 
   // ARM recommends using the gcc intrinsic __clear_cache on Linux, and the
   // library call cacheflush from unistd.h on Android:
   // blogs.arm.com/software-enablement/141-caches-and-self-modifying-code/
   #if defined(__linux__) && !defined(ANDROID)
     extern void __clear_cache(char*, char*);
     char* beg = reinterpret_cast<char*>(start);
     char* end = reinterpret_cast<char*>(start + size);
     ::__clear_cache(beg, end);
   #elif defined(ANDROID)
     cacheflush(start, start + size, 0);
   #else
     #error FlushICache only tested/supported on Linux and Android
   #endif
-
 #endif
 }
 
 
 const char* CPU::Id() {
   return
-#if !defined(HOST_ARCH_ARM)
+#if defined(USING_SIMULATOR)
   "sim"
-#endif  // !defined(HOST_ARCH_ARM)
+#endif  // defined(USING_SIMULATOR)
   "arm";
 }
 
 
 bool HostCPUFeatures::integer_division_supported_ = false;
 bool HostCPUFeatures::vfp_supported_ = false;
 bool HostCPUFeatures::neon_supported_ = false;
 bool HostCPUFeatures::hardfp_supported_ = false;
 const char* HostCPUFeatures::hardware_ = NULL;
 ARMVersion HostCPUFeatures::arm_version_ = ARMvUnknown;
 intptr_t HostCPUFeatures::store_pc_read_offset_ = 8;
 #if defined(DEBUG)
 bool HostCPUFeatures::initialized_ = false;
 #endif
 
 
-#if defined(HOST_ARCH_ARM)
+#if !defined(USING_SIMULATOR)
 void HostCPUFeatures::InitOnce() {
   bool is_arm64 = false;
   CpuInfo::InitOnce();
   hardware_ = CpuInfo::GetCpuModel();
 
   // Check for ARMv5TE, ARMv6, ARMv7, or aarch64.
   // It can be in either the Processor or Model information fields.
   if (CpuInfo::FieldContains(kCpuInfoProcessor, "aarch64") ||
       CpuInfo::FieldContains(kCpuInfoModel, "aarch64")) {
     // pretend that this arm64 cpu is really an ARMv7
@@ skipping 92 matching lines @@
 void HostCPUFeatures::Cleanup() {
   DEBUG_ASSERT(initialized_);
 #if defined(DEBUG)
   initialized_ = false;
 #endif
   ASSERT(hardware_ != NULL);
   free(const_cast<char*>(hardware_));
   hardware_ = NULL;
   CpuInfo::Cleanup();
 }
-#endif  // defined(HOST_ARCH_ARM)
+#endif  // !defined(USING_SIMULATOR)
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM