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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
| 6 // met: | 6 // met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 486 // The high 8 bits are set to zero. | 486 // The high 8 bits are set to zero. |
| 487 void label_at_put(Label* L, int at_offset); | 487 void label_at_put(Label* L, int at_offset); |
| 488 | 488 |
| 489 // Read/Modify the code target address in the branch/call instruction at pc. | 489 // Read/Modify the code target address in the branch/call instruction at pc. |
| 490 static Address target_address_at(Address pc); | 490 static Address target_address_at(Address pc); |
| 491 static void set_target_address_at(Address pc, | 491 static void set_target_address_at(Address pc, |
| 492 Address target, | 492 Address target, |
| 493 ICacheFlushMode icache_flush_mode = | 493 ICacheFlushMode icache_flush_mode = |
| 494 FLUSH_ICACHE_IF_NEEDED); | 494 FLUSH_ICACHE_IF_NEEDED); |
| 495 // On MIPS there is no Constant Pool so we skip that parameter. | 495 // On MIPS there is no Constant Pool so we skip that parameter. |
| 496 INLINE(static Address target_address_at(Address pc, Address constant_pool)) { | 496 INLINE(static Address target_address_at(Address pc, |
| 497 ConstantPoolArray* constant_pool)) { |
| 497 return target_address_at(pc); | 498 return target_address_at(pc); |
| 498 } | 499 } |
| 499 INLINE(static void set_target_address_at( | 500 INLINE(static void set_target_address_at(Address pc, |
| 500 Address pc, Address constant_pool, Address target, | 501 ConstantPoolArray* constant_pool, |
| 501 ICacheFlushMode icache_flush_mode = FLUSH_ICACHE_IF_NEEDED)) { | 502 Address target, |
| 503 ICacheFlushMode icache_flush_mode = |
| 504 FLUSH_ICACHE_IF_NEEDED)) { |
| 502 set_target_address_at(pc, target, icache_flush_mode); | 505 set_target_address_at(pc, target, icache_flush_mode); |
| 503 } | 506 } |
| 504 INLINE(static Address target_address_at(Address pc, Code* code)) { | 507 INLINE(static Address target_address_at(Address pc, Code* code)) { |
| 505 Address constant_pool = code ? code->constant_pool() : NULL; | 508 ConstantPoolArray* constant_pool = code ? code->constant_pool() : NULL; |
| 506 return target_address_at(pc, constant_pool); | 509 return target_address_at(pc, constant_pool); |
| 507 } | 510 } |
| 508 INLINE(static void set_target_address_at(Address pc, | 511 INLINE(static void set_target_address_at(Address pc, |
| 509 Code* code, | 512 Code* code, |
| 510 Address target, | 513 Address target, |
| 511 ICacheFlushMode icache_flush_mode = | 514 ICacheFlushMode icache_flush_mode = |
| 512 FLUSH_ICACHE_IF_NEEDED)) { | 515 FLUSH_ICACHE_IF_NEEDED)) { |
| 513 Address constant_pool = code ? code->constant_pool() : NULL; | 516 ConstantPoolArray* constant_pool = code ? code->constant_pool() : NULL; |
| 514 set_target_address_at(pc, constant_pool, target, icache_flush_mode); | 517 set_target_address_at(pc, constant_pool, target, icache_flush_mode); |
| 515 } | 518 } |
| 516 | 519 |
| 517 // Return the code target address at a call site from the return address | 520 // Return the code target address at a call site from the return address |
| 518 // of that call in the instruction stream. | 521 // of that call in the instruction stream. |
| 519 inline static Address target_address_from_return_address(Address pc); | 522 inline static Address target_address_from_return_address(Address pc); |
| 520 | 523 |
| 521 // Return the code target address of the patch debug break slot | 524 // Return the code target address of the patch debug break slot |
| 522 inline static Address break_address_from_return_address(Address pc); | 525 inline static Address break_address_from_return_address(Address pc); |
| 523 | 526 |
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| 1107 // Use --trace-deopt to enable. | 1110 // Use --trace-deopt to enable. |
| 1108 void RecordDeoptReason(const int reason, const SourcePosition position); | 1111 void RecordDeoptReason(const int reason, const SourcePosition position); |
| 1109 | 1112 |
| 1110 static int RelocateInternalReference(RelocInfo::Mode rmode, byte* pc, | 1113 static int RelocateInternalReference(RelocInfo::Mode rmode, byte* pc, |
| 1111 intptr_t pc_delta); | 1114 intptr_t pc_delta); |
| 1112 | 1115 |
| 1113 // Writes a single byte or word of data in the code stream. Used for | 1116 // Writes a single byte or word of data in the code stream. Used for |
| 1114 // inline tables, e.g., jump-tables. | 1117 // inline tables, e.g., jump-tables. |
| 1115 void db(uint8_t data); | 1118 void db(uint8_t data); |
| 1116 void dd(uint32_t data); | 1119 void dd(uint32_t data); |
| 1117 void dq(uint64_t data); | |
| 1118 void dp(uintptr_t data) { dq(data); } | |
| 1119 void dd(Label* label); | 1120 void dd(Label* label); |
| 1120 | 1121 |
| 1121 // Emits the address of the code stub's first instruction. | 1122 // Emits the address of the code stub's first instruction. |
| 1122 void emit_code_stub_address(Code* stub); | 1123 void emit_code_stub_address(Code* stub); |
| 1123 | 1124 |
| 1124 PositionsRecorder* positions_recorder() { return &positions_recorder_; } | 1125 PositionsRecorder* positions_recorder() { return &positions_recorder_; } |
| 1125 | 1126 |
| 1126 // Postpone the generation of the trampoline pool for the specified number of | 1127 // Postpone the generation of the trampoline pool for the specified number of |
| 1127 // instructions. | 1128 // instructions. |
| 1128 void BlockTrampolinePoolFor(int instructions); | 1129 void BlockTrampolinePoolFor(int instructions); |
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| 1193 static bool IsSw(Instr instr); | 1194 static bool IsSw(Instr instr); |
| 1194 static Instr SetSwOffset(Instr instr, int16_t offset); | 1195 static Instr SetSwOffset(Instr instr, int16_t offset); |
| 1195 static bool IsAddImmediate(Instr instr); | 1196 static bool IsAddImmediate(Instr instr); |
| 1196 static Instr SetAddImmediateOffset(Instr instr, int16_t offset); | 1197 static Instr SetAddImmediateOffset(Instr instr, int16_t offset); |
| 1197 | 1198 |
| 1198 static bool IsAndImmediate(Instr instr); | 1199 static bool IsAndImmediate(Instr instr); |
| 1199 static bool IsEmittedConstant(Instr instr); | 1200 static bool IsEmittedConstant(Instr instr); |
| 1200 | 1201 |
| 1201 void CheckTrampolinePool(); | 1202 void CheckTrampolinePool(); |
| 1202 | 1203 |
| 1203 void PatchConstantPoolAccessInstruction(int pc_offset, int offset, | 1204 // Allocate a constant pool of the correct size for the generated code. |
| 1204 ConstantPoolEntry::Access access, | 1205 Handle<ConstantPoolArray> NewConstantPool(Isolate* isolate); |
| 1205 ConstantPoolEntry::Type type) { | 1206 |
| 1206 // No embedded constant pool support. | 1207 // Generate the constant pool for the generated code. |
| 1207 UNREACHABLE(); | 1208 void PopulateConstantPool(ConstantPoolArray* constant_pool); |
| 1208 } | |
| 1209 | 1209 |
| 1210 protected: | 1210 protected: |
| 1211 // Relocation for a type-recording IC has the AST id added to it. This | 1211 // Relocation for a type-recording IC has the AST id added to it. This |
| 1212 // member variable is a way to pass the information from the call site to | 1212 // member variable is a way to pass the information from the call site to |
| 1213 // the relocation info. | 1213 // the relocation info. |
| 1214 TypeFeedbackId recorded_ast_id_; | 1214 TypeFeedbackId recorded_ast_id_; |
| 1215 | 1215 |
| 1216 inline static void set_target_internal_reference_encoded_at(Address pc, | 1216 inline static void set_target_internal_reference_encoded_at(Address pc, |
| 1217 Address target); | 1217 Address target); |
| 1218 | 1218 |
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| 1478 class EnsureSpace BASE_EMBEDDED { | 1478 class EnsureSpace BASE_EMBEDDED { |
| 1479 public: | 1479 public: |
| 1480 explicit EnsureSpace(Assembler* assembler) { | 1480 explicit EnsureSpace(Assembler* assembler) { |
| 1481 assembler->CheckBuffer(); | 1481 assembler->CheckBuffer(); |
| 1482 } | 1482 } |
| 1483 }; | 1483 }; |
| 1484 | 1484 |
| 1485 } } // namespace v8::internal | 1485 } } // namespace v8::internal |
| 1486 | 1486 |
| 1487 #endif // V8_ARM_ASSEMBLER_MIPS_H_ | 1487 #endif // V8_ARM_ASSEMBLER_MIPS_H_ |
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