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1 // Copyright 2013 the V8 project authors. All rights reserved. | 1 // Copyright 2013 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_ARM64_ASSEMBLER_ARM64_INL_H_ | 5 #ifndef V8_ARM64_ASSEMBLER_ARM64_INL_H_ |
6 #define V8_ARM64_ASSEMBLER_ARM64_INL_H_ | 6 #define V8_ARM64_ASSEMBLER_ARM64_INL_H_ |
7 | 7 |
8 #include "src/arm64/assembler-arm64.h" | 8 #include "src/arm64/assembler-arm64.h" |
9 #include "src/assembler.h" | 9 #include "src/assembler.h" |
10 #include "src/debug.h" | 10 #include "src/debug.h" |
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579 | 579 |
580 | 580 |
581 Address Assembler::target_pointer_address_at(Address pc) { | 581 Address Assembler::target_pointer_address_at(Address pc) { |
582 Instruction* instr = reinterpret_cast<Instruction*>(pc); | 582 Instruction* instr = reinterpret_cast<Instruction*>(pc); |
583 DCHECK(instr->IsLdrLiteralX()); | 583 DCHECK(instr->IsLdrLiteralX()); |
584 return reinterpret_cast<Address>(instr->ImmPCOffsetTarget()); | 584 return reinterpret_cast<Address>(instr->ImmPCOffsetTarget()); |
585 } | 585 } |
586 | 586 |
587 | 587 |
588 // Read/Modify the code target address in the branch/call instruction at pc. | 588 // Read/Modify the code target address in the branch/call instruction at pc. |
589 Address Assembler::target_address_at(Address pc, Address constant_pool) { | 589 Address Assembler::target_address_at(Address pc, |
| 590 ConstantPoolArray* constant_pool) { |
590 return Memory::Address_at(target_pointer_address_at(pc)); | 591 return Memory::Address_at(target_pointer_address_at(pc)); |
591 } | 592 } |
592 | 593 |
593 | 594 |
594 Address Assembler::target_address_at(Address pc, Code* code) { | 595 Address Assembler::target_address_at(Address pc, Code* code) { |
595 Address constant_pool = code ? code->constant_pool() : NULL; | 596 ConstantPoolArray* constant_pool = code ? code->constant_pool() : NULL; |
596 return target_address_at(pc, constant_pool); | 597 return target_address_at(pc, constant_pool); |
597 } | 598 } |
598 | 599 |
599 | 600 |
600 Address Assembler::target_address_from_return_address(Address pc) { | 601 Address Assembler::target_address_from_return_address(Address pc) { |
601 // Returns the address of the call target from the return address that will | 602 // Returns the address of the call target from the return address that will |
602 // be returned to after a call. | 603 // be returned to after a call. |
603 // Call sequence on ARM64 is: | 604 // Call sequence on ARM64 is: |
604 // ldr ip0, #... @ load from literal pool | 605 // ldr ip0, #... @ load from literal pool |
605 // blr ip0 | 606 // blr ip0 |
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657 Memory::Address_at(constant_pool_entry) = target; | 658 Memory::Address_at(constant_pool_entry) = target; |
658 } | 659 } |
659 | 660 |
660 | 661 |
661 void Assembler::deserialization_set_target_internal_reference_at( | 662 void Assembler::deserialization_set_target_internal_reference_at( |
662 Address pc, Address target, RelocInfo::Mode mode) { | 663 Address pc, Address target, RelocInfo::Mode mode) { |
663 Memory::Address_at(pc) = target; | 664 Memory::Address_at(pc) = target; |
664 } | 665 } |
665 | 666 |
666 | 667 |
667 void Assembler::set_target_address_at(Address pc, Address constant_pool, | 668 void Assembler::set_target_address_at(Address pc, |
| 669 ConstantPoolArray* constant_pool, |
668 Address target, | 670 Address target, |
669 ICacheFlushMode icache_flush_mode) { | 671 ICacheFlushMode icache_flush_mode) { |
670 Memory::Address_at(target_pointer_address_at(pc)) = target; | 672 Memory::Address_at(target_pointer_address_at(pc)) = target; |
671 // Intuitively, we would think it is necessary to always flush the | 673 // Intuitively, we would think it is necessary to always flush the |
672 // instruction cache after patching a target address in the code as follows: | 674 // instruction cache after patching a target address in the code as follows: |
673 // CpuFeatures::FlushICache(pc, sizeof(target)); | 675 // CpuFeatures::FlushICache(pc, sizeof(target)); |
674 // However, on ARM, an instruction is actually patched in the case of | 676 // However, on ARM, an instruction is actually patched in the case of |
675 // embedded constants of the form: | 677 // embedded constants of the form: |
676 // ldr ip, [pc, #...] | 678 // ldr ip, [pc, #...] |
677 // since the instruction accessing this address in the constant pool remains | 679 // since the instruction accessing this address in the constant pool remains |
678 // unchanged, a flush is not required. | 680 // unchanged, a flush is not required. |
679 } | 681 } |
680 | 682 |
681 | 683 |
682 void Assembler::set_target_address_at(Address pc, | 684 void Assembler::set_target_address_at(Address pc, |
683 Code* code, | 685 Code* code, |
684 Address target, | 686 Address target, |
685 ICacheFlushMode icache_flush_mode) { | 687 ICacheFlushMode icache_flush_mode) { |
686 Address constant_pool = code ? code->constant_pool() : NULL; | 688 ConstantPoolArray* constant_pool = code ? code->constant_pool() : NULL; |
687 set_target_address_at(pc, constant_pool, target, icache_flush_mode); | 689 set_target_address_at(pc, constant_pool, target, icache_flush_mode); |
688 } | 690 } |
689 | 691 |
690 | 692 |
691 int RelocInfo::target_address_size() { | 693 int RelocInfo::target_address_size() { |
692 return kPointerSize; | 694 return kPointerSize; |
693 } | 695 } |
694 | 696 |
695 | 697 |
696 Address RelocInfo::target_address() { | 698 Address RelocInfo::target_address() { |
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1292 | 1294 |
1293 | 1295 |
1294 void Assembler::ClearRecordedAstId() { | 1296 void Assembler::ClearRecordedAstId() { |
1295 recorded_ast_id_ = TypeFeedbackId::None(); | 1297 recorded_ast_id_ = TypeFeedbackId::None(); |
1296 } | 1298 } |
1297 | 1299 |
1298 | 1300 |
1299 } } // namespace v8::internal | 1301 } } // namespace v8::internal |
1300 | 1302 |
1301 #endif // V8_ARM64_ASSEMBLER_ARM64_INL_H_ | 1303 #endif // V8_ARM64_ASSEMBLER_ARM64_INL_H_ |
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