Fix issues with Arm's use of embedded constant pools

src/ppc/assembler-ppc.cc

Index: src/ppc/assembler-ppc.cc
diff --git a/src/ppc/assembler-ppc.cc b/src/ppc/assembler-ppc.cc
index cce578e9f6cde0c2519afdf5d72311a2b64668ce..da85d0561aad340fd6cdef06e89d234500f626c8 100644
--- a/src/ppc/assembler-ppc.cc
+++ b/src/ppc/assembler-ppc.cc
@@ -244,22 +244,22 @@ void Assembler::GetCode(CodeDesc* desc) {
 
 
 void Assembler::Align(int m) {
-#if V8_TARGET_ARCH_PPC64
-  DCHECK(m >= 4 && base::bits::IsPowerOfTwo64(m));
-#else
   DCHECK(m >= 4 && base::bits::IsPowerOfTwo32(m));
-#endif
-  // First ensure instruction alignment
-  while (pc_offset() & (kInstrSize - 1)) {
-    db(0);
-  }
-  // Then pad to requested alignedment with nops
-  while (pc_offset() & (m - 1)) {
+  DCHECK((pc_offset() & (kInstrSize - 1)) == 0);
+  while ((pc_offset() & (m - 1)) != 0) {
     nop();
   }
 }
 
 
+void Assembler::DataAlign(int m) {

[rmcilroy, 2015/06/09 14:14:43]

These are all the same aren't they? Couldn't you just implement this in the
arch-independent assembler.cc?

[MTBrandyberry, 2015/06/09 14:19:08]

I didn't see a precedent for services like this in AssemblerBase.  I'd be happy
to put it there.

+  DCHECK(m >= 2 && base::bits::IsPowerOfTwo32(m));
+  while ((pc_offset() & (m - 1)) != 0) {
+    db(0);
+  }
+}
+
+
 void Assembler::CodeTargetAlign() { Align(8); }