Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(835)

Side by Side Diff: src/arm/macro-assembler-arm.cc

Issue 1155673005: Fix issues with Arm's use of embedded constant pools (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Move DataAlign implementation to common code Created 5 years, 6 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « src/arm/frames-arm.h ('k') | src/arm64/assembler-arm64.h » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <limits.h> // For LONG_MIN, LONG_MAX. 5 #include <limits.h> // For LONG_MIN, LONG_MAX.
6 6
7 #include "src/v8.h" 7 #include "src/v8.h"
8 8
9 #if V8_TARGET_ARCH_ARM 9 #if V8_TARGET_ARCH_ARM
10 10
(...skipping 689 matching lines...) Expand 10 before | Expand all | Expand 10 after
700 void MacroAssembler::PopFixedFrame(Register marker_reg) { 700 void MacroAssembler::PopFixedFrame(Register marker_reg) {
701 DCHECK(!marker_reg.is_valid() || marker_reg.code() < cp.code()); 701 DCHECK(!marker_reg.is_valid() || marker_reg.code() < cp.code());
702 ldm(ia_w, sp, (marker_reg.is_valid() ? marker_reg.bit() : 0) | cp.bit() | 702 ldm(ia_w, sp, (marker_reg.is_valid() ? marker_reg.bit() : 0) | cp.bit() |
703 (FLAG_enable_embedded_constant_pool ? pp.bit() : 0) | 703 (FLAG_enable_embedded_constant_pool ? pp.bit() : 0) |
704 fp.bit() | lr.bit()); 704 fp.bit() | lr.bit());
705 } 705 }
706 706
707 707
708 // Push and pop all registers that can hold pointers. 708 // Push and pop all registers that can hold pointers.
709 void MacroAssembler::PushSafepointRegisters() { 709 void MacroAssembler::PushSafepointRegisters() {
710 // Safepoints expect a block of contiguous register values starting with r0: 710 // Safepoints expect a block of contiguous register values starting with r0.
711 DCHECK(((1 << kNumSafepointSavedRegisters) - 1) == kSafepointSavedRegisters); 711 // except when FLAG_enable_embedded_constant_pool, which omits pp.
712 DCHECK(kSafepointSavedRegisters ==
713 (FLAG_enable_embedded_constant_pool
714 ? ((1 << (kNumSafepointSavedRegisters + 1)) - 1) & ~pp.bit()
715 : (1 << kNumSafepointSavedRegisters) - 1));
712 // Safepoints expect a block of kNumSafepointRegisters values on the 716 // Safepoints expect a block of kNumSafepointRegisters values on the
713 // stack, so adjust the stack for unsaved registers. 717 // stack, so adjust the stack for unsaved registers.
714 const int num_unsaved = kNumSafepointRegisters - kNumSafepointSavedRegisters; 718 const int num_unsaved = kNumSafepointRegisters - kNumSafepointSavedRegisters;
715 DCHECK(num_unsaved >= 0); 719 DCHECK(num_unsaved >= 0);
716 sub(sp, sp, Operand(num_unsaved * kPointerSize)); 720 sub(sp, sp, Operand(num_unsaved * kPointerSize));
717 stm(db_w, sp, kSafepointSavedRegisters); 721 stm(db_w, sp, kSafepointSavedRegisters);
718 } 722 }
719 723
720 724
721 void MacroAssembler::PopSafepointRegisters() { 725 void MacroAssembler::PopSafepointRegisters() {
722 const int num_unsaved = kNumSafepointRegisters - kNumSafepointSavedRegisters; 726 const int num_unsaved = kNumSafepointRegisters - kNumSafepointSavedRegisters;
723 ldm(ia_w, sp, kSafepointSavedRegisters); 727 ldm(ia_w, sp, kSafepointSavedRegisters);
724 add(sp, sp, Operand(num_unsaved * kPointerSize)); 728 add(sp, sp, Operand(num_unsaved * kPointerSize));
725 } 729 }
726 730
727 731
728 void MacroAssembler::StoreToSafepointRegisterSlot(Register src, Register dst) { 732 void MacroAssembler::StoreToSafepointRegisterSlot(Register src, Register dst) {
729 str(src, SafepointRegisterSlot(dst)); 733 str(src, SafepointRegisterSlot(dst));
730 } 734 }
731 735
732 736
733 void MacroAssembler::LoadFromSafepointRegisterSlot(Register dst, Register src) { 737 void MacroAssembler::LoadFromSafepointRegisterSlot(Register dst, Register src) {
734 ldr(dst, SafepointRegisterSlot(src)); 738 ldr(dst, SafepointRegisterSlot(src));
735 } 739 }
736 740
737 741
738 int MacroAssembler::SafepointRegisterStackIndex(int reg_code) { 742 int MacroAssembler::SafepointRegisterStackIndex(int reg_code) {
739 // The registers are pushed starting with the highest encoding, 743 // The registers are pushed starting with the highest encoding,
740 // which means that lowest encodings are closest to the stack pointer. 744 // which means that lowest encodings are closest to the stack pointer.
745 if (FLAG_enable_embedded_constant_pool && reg_code > pp.code()) {
746 // RegList omits pp.
747 reg_code -= 1;
748 }
741 DCHECK(reg_code >= 0 && reg_code < kNumSafepointRegisters); 749 DCHECK(reg_code >= 0 && reg_code < kNumSafepointRegisters);
742 return reg_code; 750 return reg_code;
743 } 751 }
744 752
745 753
746 MemOperand MacroAssembler::SafepointRegisterSlot(Register reg) { 754 MemOperand MacroAssembler::SafepointRegisterSlot(Register reg) {
747 return MemOperand(sp, SafepointRegisterStackIndex(reg.code()) * kPointerSize); 755 return MemOperand(sp, SafepointRegisterStackIndex(reg.code()) * kPointerSize);
748 } 756 }
749 757
750 758
(...skipping 3161 matching lines...) Expand 10 before | Expand all | Expand 10 after
3912 } 3920 }
3913 } 3921 }
3914 if (mag.shift > 0) mov(result, Operand(result, ASR, mag.shift)); 3922 if (mag.shift > 0) mov(result, Operand(result, ASR, mag.shift));
3915 add(result, result, Operand(dividend, LSR, 31)); 3923 add(result, result, Operand(dividend, LSR, 31));
3916 } 3924 }
3917 3925
3918 } // namespace internal 3926 } // namespace internal
3919 } // namespace v8 3927 } // namespace v8
3920 3928
3921 #endif // V8_TARGET_ARCH_ARM 3929 #endif // V8_TARGET_ARCH_ARM
OLDNEW
« no previous file with comments | « src/arm/frames-arm.h ('k') | src/arm64/assembler-arm64.h » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698