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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
| 6 // are met: | 6 // are met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 487 desc->instr_size = pc_offset(); | 487 desc->instr_size = pc_offset(); |
| 488 desc->reloc_size = (buffer_ + buffer_size_) - reloc_info_writer.pos(); | 488 desc->reloc_size = (buffer_ + buffer_size_) - reloc_info_writer.pos(); |
| 489 desc->constant_pool_size = | 489 desc->constant_pool_size = |
| 490 (constant_pool_offset ? desc->instr_size - constant_pool_offset : 0); | 490 (constant_pool_offset ? desc->instr_size - constant_pool_offset : 0); |
| 491 desc->origin = this; | 491 desc->origin = this; |
| 492 } | 492 } |
| 493 | 493 |
| 494 | 494 |
| 495 void Assembler::Align(int m) { | 495 void Assembler::Align(int m) { |
| 496 DCHECK(m >= 4 && base::bits::IsPowerOfTwo32(m)); | 496 DCHECK(m >= 4 && base::bits::IsPowerOfTwo32(m)); |
| 497 DCHECK((pc_offset() & (kInstrSize - 1)) == 0); |
| 497 while ((pc_offset() & (m - 1)) != 0) { | 498 while ((pc_offset() & (m - 1)) != 0) { |
| 498 nop(); | 499 nop(); |
| 499 } | 500 } |
| 500 } | 501 } |
| 501 | 502 |
| 502 | 503 |
| 504 void Assembler::DataAlign(int m) { |
| 505 DCHECK(m >= 2 && base::bits::IsPowerOfTwo32(m)); |
| 506 while ((pc_offset() & (m - 1)) != 0) { |
| 507 db(0); |
| 508 } |
| 509 } |
| 510 |
| 511 |
| 503 void Assembler::CodeTargetAlign() { | 512 void Assembler::CodeTargetAlign() { |
| 504 // Preferred alignment of jump targets on some ARM chips. | 513 // Preferred alignment of jump targets on some ARM chips. |
| 505 Align(8); | 514 Align(8); |
| 506 } | 515 } |
| 507 | 516 |
| 508 | 517 |
| 509 Condition Assembler::GetCondition(Instr instr) { | 518 Condition Assembler::GetCondition(Instr instr) { |
| 510 return Instruction::ConditionField(instr); | 519 return Instruction::ConditionField(instr); |
| 511 } | 520 } |
| 512 | 521 |
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| 3950 DCHECK(is_uint12(offset)); | 3959 DCHECK(is_uint12(offset)); |
| 3951 instr_at_put(pc, SetLdrRegisterImmediateOffset(instr, offset)); | 3960 instr_at_put(pc, SetLdrRegisterImmediateOffset(instr, offset)); |
| 3952 } | 3961 } |
| 3953 } | 3962 } |
| 3954 | 3963 |
| 3955 | 3964 |
| 3956 } // namespace internal | 3965 } // namespace internal |
| 3957 } // namespace v8 | 3966 } // namespace v8 |
| 3958 | 3967 |
| 3959 #endif // V8_TARGET_ARCH_ARM | 3968 #endif // V8_TARGET_ARCH_ARM |
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