Fix issues with Arm's use of embedded constant pools

src/arm/assembler-arm.cc

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions
 // are met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 476 matching lines @@
   desc->instr_size = pc_offset();
   desc->reloc_size = (buffer_ + buffer_size_) - reloc_info_writer.pos();
   desc->constant_pool_size =
       (constant_pool_offset ? desc->instr_size - constant_pool_offset : 0);
   desc->origin = this;
 }
 
 
 void Assembler::Align(int m) {
   DCHECK(m >= 4 && base::bits::IsPowerOfTwo32(m));
+  // First ensure instruction alignment
+  while (pc_offset() & (kInstrSize - 1)) {
+    db(0);
+  }

[rmcilroy, 2015/06/08 11:11:10]

I'm not keen on adding this to Align since it makes it possible to insert
non-instructions into the bytestream if something goes wrong with alignment.
Instead, please add a different DataAlign() function (if you could also add a
DCHECK here that pc_offset() is 4 byte aligned that would be great).

[MTBrandyberry, 2015/06/08 13:52:39]

Done.

+  // Then pad to requested alignedment with nops
   while ((pc_offset() & (m - 1)) != 0) {
     nop();
   }
 }
 
 
 void Assembler::CodeTargetAlign() {
   // Preferred alignment of jump targets on some ARM chips.
   Align(8);
 }
@@ skipping 3443 matching lines @@
     DCHECK(is_uint12(offset));
     instr_at_put(pc, SetLdrRegisterImmediateOffset(instr, offset));
   }
 }
 
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_TARGET_ARCH_ARM