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Issue 1153213003: MIPS: Fix compile error for unitialized variable in simulator. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 6 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <limits.h> 5 #include <limits.h>
6 #include <stdarg.h> 6 #include <stdarg.h>
7 #include <stdlib.h> 7 #include <stdlib.h>
8 #include <cmath> 8 #include <cmath>
9 9
10 #include "src/v8.h" 10 #include "src/v8.h"
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2447 2447
2448 void Simulator::DecodeTypeRegisterDRsType(Instruction* instr, 2448 void Simulator::DecodeTypeRegisterDRsType(Instruction* instr,
2449 const int32_t& fr_reg, 2449 const int32_t& fr_reg,
2450 const int32_t& fs_reg, 2450 const int32_t& fs_reg,
2451 const int32_t& ft_reg, 2451 const int32_t& ft_reg,
2452 const int32_t& fd_reg) { 2452 const int32_t& fd_reg) {
2453 double ft, fs, fd; 2453 double ft, fs, fd;
2454 uint32_t cc, fcsr_cc; 2454 uint32_t cc, fcsr_cc;
2455 int64_t i64; 2455 int64_t i64;
2456 fs = get_fpu_register_double(fs_reg); 2456 fs = get_fpu_register_double(fs_reg);
2457 if (instr->FunctionFieldRaw() != MOVF) { 2457 ft = (instr->FunctionFieldRaw() != MOVF) ? get_fpu_register_double(ft_reg)
2458 ft = get_fpu_register_double(ft_reg); 2458 : 0.0;
2459 }
2460 fd = get_fpu_register_double(fd_reg); 2459 fd = get_fpu_register_double(fd_reg);
2461 int64_t ft_int = bit_cast<int64_t>(ft); 2460 int64_t ft_int = bit_cast<int64_t>(ft);
2462 int64_t fd_int = bit_cast<int64_t>(fd); 2461 int64_t fd_int = bit_cast<int64_t>(fd);
2463 cc = instr->FCccValue(); 2462 cc = instr->FCccValue();
2464 fcsr_cc = get_fcsr_condition_bit(cc); 2463 fcsr_cc = get_fcsr_condition_bit(cc);
2465 switch (instr->FunctionFieldRaw()) { 2464 switch (instr->FunctionFieldRaw()) {
2466 case RINT: { 2465 case RINT: {
2467 DCHECK(IsMipsArchVariant(kMips32r6)); 2466 DCHECK(IsMipsArchVariant(kMips32r6));
2468 double result, temp, temp_result; 2467 double result, temp, temp_result;
2469 double upper = std::ceil(fs); 2468 double upper = std::ceil(fs);
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4431 } 4430 }
4432 4431
4433 4432
4434 #undef UNSUPPORTED 4433 #undef UNSUPPORTED
4435 4434
4436 } } // namespace v8::internal 4435 } } // namespace v8::internal
4437 4436
4438 #endif // USE_SIMULATOR 4437 #endif // USE_SIMULATOR
4439 4438
4440 #endif // V8_TARGET_ARCH_MIPS 4439 #endif // V8_TARGET_ARCH_MIPS
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