Subzero ARM: lowerLoad and lowerStore.

src/IceInstARM32.h

 //===- subzero/src/IceInstARM32.h - ARM32 machine instructions --*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file declares the InstARM32 and OperandARM32 classes and
@@ skipping 73 matching lines @@
   };
 
   // Provide two constructors.
   // NOTE: The Variable-typed operands have to be registers.
   //
   // (1) Reg + Imm. The Immediate actually has a limited number of bits
   // for encoding, so check canHoldOffset first. It cannot handle
   // general Constant operands like ConstantRelocatable, since a relocatable
   // can potentially take up too many bits.
   static OperandARM32Mem *create(Cfg *Func, Type Ty, Variable *Base,
-                                 ConstantInteger32 *ImmOffset = nullptr,
+                                 ConstantInteger32 *ImmOffset,
                                  AddrMode Mode = Offset) {
     return new (Func->allocate<OperandARM32Mem>())
         OperandARM32Mem(Func, Ty, Base, ImmOffset, Mode);
   }
   // (2) Reg +/- Reg with an optional shift of some kind and amount.
   // Note that this mode is disallowed in the NaCl sandbox.
   static OperandARM32Mem *create(Cfg *Func, Type Ty, Variable *Base,
                                  Variable *Index, ShiftKind ShiftOp = kNoShift,
                                  uint16_t ShiftAmt = 0,
                                  AddrMode Mode = Offset) {
@@ skipping 165 matching lines @@
     Mov,
     Movt,
     Movw,
     Mul,
     Mvn,
     Orr,
     Pop,
     Push,
     Ret,
     Sbc,
+    Str,
     Sub,
     Umull
   };
 
   static const char *getWidthString(Type Ty);
   static CondARM32::Cond getOppositeCondition(CondARM32::Cond Cond);
 
   void dump(const Cfg *Func) const override;
 
 protected:
@@ skipping 466 matching lines @@
   void emit(const Cfg *Func) const override;
   void emitIAS(const Cfg *Func) const override;
   void dump(const Cfg *Func) const override;
   static bool classof(const Inst *Inst) { return isClassof(Inst, Ret); }
 
 private:
   InstARM32Ret(Cfg *Func, Variable *LR, Variable *Source);
   ~InstARM32Ret() override {}
 };
 
+// Store instruction. It's important for liveness that there is no Dest
+// operand (OperandARM32Mem instead of Dest Variable).
+class InstARM32Str : public InstARM32Pred {
+  InstARM32Str() = delete;
+  InstARM32Str(const InstARM32Str &) = delete;
+  InstARM32Str &operator=(const InstARM32Str &) = delete;
+
+public:
+  // Value must be a register.
+  static InstARM32Str *create(Cfg *Func, Variable *Value, OperandARM32Mem *Mem,
+                              CondARM32::Cond Predicate) {
+    return new (Func->allocate<InstARM32Str>())
+        InstARM32Str(Func, Value, Mem, Predicate);
+  }
+  void emit(const Cfg *Func) const override;
+  void emitIAS(const Cfg *Func) const override;
+  void dump(const Cfg *Func) const override;
+  static bool classof(const Inst *Inst) { return isClassof(Inst, Str); }
+
+private:
+  InstARM32Str(Cfg *Func, Variable *Value, OperandARM32Mem *Mem,
+               CondARM32::Cond Predicate);
+  ~InstARM32Str() override {}
+};
+
 // Unsigned Multiply Long: d.lo, d.hi := x * y
 class InstARM32Umull : public InstARM32Pred {
   InstARM32Umull() = delete;
   InstARM32Umull(const InstARM32Umull &) = delete;
   InstARM32Umull &operator=(const InstARM32Umull &) = delete;
 
 public:
   // Everything must be a register.
   static InstARM32Umull *create(Cfg *Func, Variable *DestLo, Variable *DestHi,
                                 Variable *Src0, Variable *Src1,
@@ skipping 16 matching lines @@
 // Declare partial template specializations of emit() methods that
 // already have default implementations.  Without this, there is the
 // possibility of ODR violations and link errors.
 
 template <> void InstARM32Movw::emit(const Cfg *Func) const;
 template <> void InstARM32Movt::emit(const Cfg *Func) const;
 
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEINSTARM32_H