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Side by Side Diff: src/IceTargetLoweringARM32.def

Issue 1151663004: Subzero ARM: do lowerIcmp, lowerBr, and a bit of lowerCall. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: fix Created 5 years, 7 months ago
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1 //===- subzero/src/IceTargetLoweringARM32.def - ARM32 X-macros --*- C++ -*-===// 1 //===- subzero/src/IceTargetLoweringARM32.def - ARM32 X-macros --*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file defines certain patterns for lowering to ARM32 target 10 // This file defines certain patterns for lowering to ARM32 target
11 // instructions, in the form of x-macros. 11 // instructions, in the form of x-macros.
12 // 12 //
13 //===----------------------------------------------------------------------===// 13 //===----------------------------------------------------------------------===//
14 14
15 #ifndef SUBZERO_SRC_ICETARGETLOWERINGARM32_DEF 15 #ifndef SUBZERO_SRC_ICETARGETLOWERINGARM32_DEF
16 #define SUBZERO_SRC_ICETARGETLOWERINGARM32_DEF 16 #define SUBZERO_SRC_ICETARGETLOWERINGARM32_DEF
17 17
18 // TODO(jvoung): Fill out comparison tables, etc. for 32/64-bit compares. 18 // Patterns for lowering icmp.
19 #define ICMPARM32_TABLE \
20 /* val, is_signed, swapped64, C_32, C1_64, C2_64 */ \
21 X(Eq, false, false, EQ, EQ, NE) \
22 X(Ne, false, false, NE, NE, EQ) \
23 X(Ugt, false, false, HI, HI, LS) \
24 X(Uge, false, false, CS, CS, CC) \
25 X(Ult, false, false, CC, CC, CS) \
26 X(Ule, false, false, LS, LS, HI) \
27 X(Sgt, true, true, GT, LT, GE) \
28 X(Sge, true, false, GE, GE, LT) \
29 X(Slt, true, false, LT, LT, GE) \
30 X(Sle, true, true, LE, GE, LT) \
31 //#define X(val, is_signed, swapped64, C_32, C1_64, C2_64)
19 32
20 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_DEF 33 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_DEF
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