Subzero ARM: do lowerIcmp, lowerBr, and a bit of lowerCall.

src/IceInstX8632.h

 //===- subzero/src/IceInstX8632.h - x86-32 machine instructions -*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file declares the InstX8632 and OperandX8632 classes and
 // their subclasses.  This represents the machine instructions and
 // operands used for x86-32 code selection.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef SUBZERO_SRC_ICEINSTX8632_H
 #define SUBZERO_SRC_ICEINSTX8632_H
 
 #include "assembler_ia32.h"
+#include "IceConditionCodesX8632.h"
 #include "IceDefs.h"
 #include "IceInst.h"
-#include "IceConditionCodesX8632.h"
 #include "IceInstX8632.def"
 #include "IceOperand.h"
 
 namespace Ice {
 
 class TargetX8632;
 
 // OperandX8632 extends the Operand hierarchy.  Its subclasses are
 // OperandX8632Mem and VariableSplit.
 class OperandX8632 : public Operand {
@@ skipping 228 matching lines @@
     Xadd,
     Xchg,
     Xor
   };
 
   static const char *getWidthString(Type Ty);
   static const char *getFldString(Type Ty);
   static CondX86::BrCond getOppositeCondition(CondX86::BrCond Cond);
   void dump(const Cfg *Func) const override;
 
+  // Shared emit routines for common forms of instructions.
+  // See the definition of emitTwoAddress() for a description of
+  // ShiftHack.
+  static void emitTwoAddress(const char *Opcode, const Inst *Inst,
+                             const Cfg *Func, bool ShiftHack = false);
+
+  static void
+  emitIASGPRShift(const Cfg *Func, Type Ty, const Variable *Var,
+                  const Operand *Src,
+                  const X8632::AssemblerX8632::GPREmitterShiftOp &Emitter);
+
 protected:
   InstX8632(Cfg *Func, InstKindX8632 Kind, SizeT Maxsrcs, Variable *Dest)
       : InstTarget(Func, static_cast<InstKind>(Kind), Maxsrcs, Dest) {}
   ~InstX8632() override {}
   static bool isClassof(const Inst *Inst, InstKindX8632 MyKind) {
     return Inst->getKind() == static_cast<InstKind>(MyKind);
   }
   // Most instructions that operate on vector arguments require vector
   // memory operands to be fully aligned (16-byte alignment for PNaCl
   // vector types).  The stack frame layout and call ABI ensure proper
@@ skipping 377 matching lines @@
 private:
   InstX8632UnaryopXmm(Cfg *Func, Variable *Dest, Operand *Src)
       : InstX8632(Func, K, 1, Dest) {
     addSource(Src);
   }
   ~InstX8632UnaryopXmm() override {}
   static const char *Opcode;
   static const X8632::AssemblerX8632::XmmEmitterRegOp Emitter;
 };
 
-// See the definition of emitTwoAddress() for a description of
-// ShiftHack.
-void emitTwoAddress(const char *Opcode, const Inst *Inst, const Cfg *Func,
-                    bool ShiftHack = false);
-
-void emitIASGPRShift(const Cfg *Func, Type Ty, const Variable *Var,
-                     const Operand *Src,
-                     const X8632::AssemblerX8632::GPREmitterShiftOp &Emitter);
-
 template <InstX8632::InstKindX8632 K>
 class InstX8632BinopGPRShift : public InstX8632 {
   InstX8632BinopGPRShift() = delete;
   InstX8632BinopGPRShift(const InstX8632BinopGPRShift &) = delete;
   InstX8632BinopGPRShift &operator=(const InstX8632BinopGPRShift &) = delete;
 
 public:
   // Create a binary-op GPR shift instruction.
   static InstX8632BinopGPRShift *create(Cfg *Func, Variable *Dest,
                                         Operand *Source) {
@@ skipping 1016 matching lines @@
 template <> void InstX8632Pinsr::emitIAS(const Cfg *Func) const;
 template <> void InstX8632Movsx::emitIAS(const Cfg *Func) const;
 template <> void InstX8632Movzx::emitIAS(const Cfg *Func) const;
 template <> void InstX8632Pmull::emitIAS(const Cfg *Func) const;
 template <> void InstX8632Pshufd::emitIAS(const Cfg *Func) const;
 template <> void InstX8632Shufps::emitIAS(const Cfg *Func) const;
 
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEINSTX8632_H