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| 1 //===- subzero/src/IceConditionCodesARM32.h - Condition Codes ---*- C++ -*-===// |
| 2 // |
| 3 // The Subzero Code Generator |
| 4 // |
| 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. |
| 7 // |
| 8 //===----------------------------------------------------------------------===// |
| 9 // |
| 10 // This file declares the condition codes for ARM32. |
| 11 // |
| 12 //===----------------------------------------------------------------------===// |
| 13 |
| 14 #ifndef SUBZERO_SRC_ICECONDITIONCODESARM32_H |
| 15 #define SUBZERO_SRC_ICECONDITIONCODESARM32_H |
| 16 |
| 17 #include "IceDefs.h" |
| 18 #include "IceInstARM32.def" |
| 19 |
| 20 namespace Ice { |
| 21 |
| 22 class CondARM32 { |
| 23 CondARM32() = delete; |
| 24 CondARM32(const CondARM32 &) = delete; |
| 25 CondARM32 &operator=(const CondARM32 &) = delete; |
| 26 |
| 27 public: |
| 28 // An enum of codes used for conditional instructions. The enum value |
| 29 // should match the value used to encode operands in binary instructions. |
| 30 enum Cond { |
| 31 #define X(tag, encode, opp, emit) tag = encode, |
| 32 ICEINSTARM32COND_TABLE |
| 33 #undef X |
| 34 }; |
| 35 }; |
| 36 |
| 37 } // end of namespace Ice |
| 38 |
| 39 #endif // SUBZERO_SRC_ICECONDITIONCODESARM32_H |
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