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1 ; RUN: opt < %s -nacl-rewrite-atomics -remove-asm-memory -S | \ | 1 ; RUN: opt < %s -nacl-rewrite-atomics -remove-asm-memory -S | \ |
2 ; RUN: FileCheck %s | 2 ; RUN: FileCheck %s |
3 ; RUN: opt < %s -O3 -nacl-rewrite-atomics -remove-asm-memory -S | \ | 3 ; RUN: opt < %s -O3 -nacl-rewrite-atomics -remove-asm-memory -S | \ |
4 ; RUN: FileCheck %s | 4 ; RUN: FileCheck %s |
5 ; RUN: opt < %s -O3 -nacl-rewrite-atomics -remove-asm-memory -S | \ | 5 ; RUN: opt < %s -O3 -nacl-rewrite-atomics -remove-asm-memory -S | \ |
6 ; RUN: FileCheck %s -check-prefix=ELIM | 6 ; RUN: FileCheck %s -check-prefix=ELIM |
7 ; RUN: opt < %s -nacl-rewrite-atomics -remove-asm-memory -S | \ | 7 ; RUN: opt < %s -nacl-rewrite-atomics -remove-asm-memory -S | \ |
8 ; RUN: FileCheck %s -check-prefix=CLEANED | 8 ; RUN: FileCheck %s -check-prefix=CLEANED |
9 | 9 |
10 ; ``asm("":::"memory")`` is used as a compiler barrier and the GCC-style | 10 ; ``asm("":::"memory")`` is used as a compiler barrier and the GCC-style |
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32 call void asm sideeffect "", "~{memory}"() | 32 call void asm sideeffect "", "~{memory}"() |
33 call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"() | 33 call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"() |
34 call void asm sideeffect "", "~{foo},~{memory},~{bar}"() | 34 call void asm sideeffect "", "~{foo},~{memory},~{bar}"() |
35 | 35 |
36 ret void | 36 ret void |
37 ; CHECK-NEXT: ret void | 37 ; CHECK-NEXT: ret void |
38 } | 38 } |
39 | 39 |
40 define void @memory_assembly_ordering_test() { | 40 define void @memory_assembly_ordering_test() { |
41 ; CHECK: @memory_assembly_ordering_test() | 41 ; CHECK: @memory_assembly_ordering_test() |
42 %1 = load i32* @a, align 4 | 42 %1 = load i32, i32* @a, align 4 |
43 store i32 %1, i32* @b, align 4 | 43 store i32 %1, i32* @b, align 4 |
44 call void asm sideeffect "", "~{memory}"() | 44 call void asm sideeffect "", "~{memory}"() |
45 fence seq_cst | 45 fence seq_cst |
46 call void asm sideeffect "", "~{memory}"() | 46 call void asm sideeffect "", "~{memory}"() |
47 ; CHECK-NEXT: %1 = load i32* @a, align 4 | 47 ; CHECK-NEXT: %1 = load i32, i32* @a, align 4 |
48 ; CHECK-NEXT: store i32 %1, i32* @b, align 4 | 48 ; CHECK-NEXT: store i32 %1, i32* @b, align 4 |
49 ; CHECK-NEXT: call void @llvm.nacl.atomic.fence.all() | 49 ; CHECK-NEXT: call void @llvm.nacl.atomic.fence.all() |
50 | 50 |
51 ; Redundant load from the previous location, and store to the same | 51 ; Redundant load from the previous location, and store to the same |
52 ; location (making the previous one dead). Shouldn't get eliminated | 52 ; location (making the previous one dead). Shouldn't get eliminated |
53 ; because of the fence. | 53 ; because of the fence. |
54 %2 = load i32* @a, align 4 | 54 %2 = load i32, i32* @a, align 4 |
55 store i32 %2, i32* @b, align 4 | 55 store i32 %2, i32* @b, align 4 |
56 call void asm sideeffect "", "~{memory}"() | 56 call void asm sideeffect "", "~{memory}"() |
57 fence seq_cst | 57 fence seq_cst |
58 call void asm sideeffect "", "~{memory}"() | 58 call void asm sideeffect "", "~{memory}"() |
59 ; CHECK-NEXT: %2 = load i32* @a, align 4 | 59 ; CHECK-NEXT: %2 = load i32, i32* @a, align 4 |
60 ; CHECK-NEXT: store i32 %2, i32* @b, align 4 | 60 ; CHECK-NEXT: store i32 %2, i32* @b, align 4 |
61 ; CHECK-NEXT: call void @llvm.nacl.atomic.fence.all() | 61 ; CHECK-NEXT: call void @llvm.nacl.atomic.fence.all() |
62 | 62 |
63 ; Same here. | 63 ; Same here. |
64 %3 = load i32* @a, align 4 | 64 %3 = load i32, i32* @a, align 4 |
65 store i32 %3, i32* @b, align 4 | 65 store i32 %3, i32* @b, align 4 |
66 ; CHECK-NEXT: %3 = load i32* @a, align 4 | 66 ; CHECK-NEXT: %3 = load i32, i32* @a, align 4 |
67 ; CHECK-NEXT: store i32 %3, i32* @b, align 4 | 67 ; CHECK-NEXT: store i32 %3, i32* @b, align 4 |
68 | 68 |
69 ret void | 69 ret void |
70 ; CHECK-NEXT: ret void | 70 ; CHECK-NEXT: ret void |
71 } | 71 } |
72 | 72 |
73 ; Same function as above, but without the barriers. At O3 some loads and | 73 ; Same function as above, but without the barriers. At O3 some loads and |
74 ; stores should get eliminated. | 74 ; stores should get eliminated. |
75 define void @memory_ordering_test() { | 75 define void @memory_ordering_test() { |
76 ; ELIM: @memory_ordering_test() | 76 ; ELIM: @memory_ordering_test() |
77 %1 = load i32* @a, align 4 | 77 %1 = load i32, i32* @a, align 4 |
78 store i32 %1, i32* @b, align 4 | 78 store i32 %1, i32* @b, align 4 |
79 %2 = load i32* @a, align 4 | 79 %2 = load i32, i32* @a, align 4 |
80 store i32 %2, i32* @b, align 4 | 80 store i32 %2, i32* @b, align 4 |
81 %3 = load i32* @a, align 4 | 81 %3 = load i32, i32* @a, align 4 |
82 store i32 %3, i32* @b, align 4 | 82 store i32 %3, i32* @b, align 4 |
83 ; ELIM-NEXT: %1 = load i32* @a, align 4 | 83 ; ELIM-NEXT: %1 = load i32, i32* @a, align 4 |
84 ; ELIM-NEXT: store i32 %1, i32* @b, align 4 | 84 ; ELIM-NEXT: store i32 %1, i32* @b, align 4 |
85 | 85 |
86 ret void | 86 ret void |
87 ; ELIM-NEXT: ret void | 87 ; ELIM-NEXT: ret void |
88 } | 88 } |
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