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Side by Side Diff: test/NaCl/X86/nacl-read-tp-intrinsic.ll

Issue 1151093004: Changes from 3.7 merge to files not in upstream (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-llvm.git@master
Patch Set: Created 5 years, 7 months ago
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1 ; RUN: pnacl-llc -mtriple=i386-unknown-nacl -filetype=asm %s -o - \ 1 ; RUN: pnacl-llc -mtriple=i386-unknown-nacl -filetype=asm %s -o - \
2 ; RUN: | FileCheck -check-prefix=X32 %s 2 ; RUN: | FileCheck -check-prefix=X32 %s
3 3
4 ; RUN: pnacl-llc -mtriple=i386-unknown-nacl -filetype=asm -mtls-use-call %s -o - \ 4 ; RUN: pnacl-llc -mtriple=i386-unknown-nacl -filetype=asm -mtls-use-call %s -o - \
5 ; RUN: | FileCheck -check-prefix=USE_CALL %s 5 ; RUN: | FileCheck -check-prefix=USE_CALL %s
6 6
7 ; RUN: pnacl-llc -mtriple=x86_64-unknown-nacl -filetype=asm %s -o - \ 7 ; RUN: pnacl-llc -mtriple=x86_64-unknown-nacl -filetype=asm %s -o - \
8 ; RUN: | FileCheck -check-prefix=USE_CALL %s 8 ; RUN: | FileCheck -check-prefix=USE_CALL %s
9 9
10 ; "-mtls-use-call" should not make any difference on x86-64. 10 ; "-mtls-use-call" should not make any difference on x86-64.
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27 27
28 28
29 ; Make sure that we do not generate: 29 ; Make sure that we do not generate:
30 ; movl $1000, %eax 30 ; movl $1000, %eax
31 ; addl %gs:0, %eax 31 ; addl %gs:0, %eax
32 ; The x86-32 NaCl validator only accepts %gs with "mov", not with 32 ; The x86-32 NaCl validator only accepts %gs with "mov", not with
33 ; "add". Note that we had to use a large immediate to trigger the bug 33 ; "add". Note that we had to use a large immediate to trigger the bug
34 ; and generate the code above. 34 ; and generate the code above.
35 define i8* @get_thread_pointer_add() { 35 define i8* @get_thread_pointer_add() {
36 %tp = call i8* @llvm.nacl.read.tp() 36 %tp = call i8* @llvm.nacl.read.tp()
37 %result = getelementptr i8* %tp, i32 1000 37 %result = getelementptr i8, i8* %tp, i32 1000
38 ret i8* %result 38 ret i8* %result
39 } 39 }
40 40
41 ; X32: get_thread_pointer_add: 41 ; X32: get_thread_pointer_add:
42 ; X32: movl %gs:0, %eax 42 ; X32: movl %gs:0, %eax
43 ; X32: addl $1000, %eax 43 ; X32: addl $1000, %eax
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