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| 1 ; Simple test to see if pnacl-bccompress maintains bitcode. | 1 ; Simple test to see if pnacl-bccompress maintains bitcode. |
| 2 | 2 |
| 3 ; Test 1: Show that we generate the same disassembled code. | 3 ; Test 1: Show that we generate the same disassembled code. |
| 4 ; RUN: llvm-as < %s | pnacl-freeze -allow-local-symbol-tables \ | 4 ; RUN: llvm-as < %s | pnacl-freeze -allow-local-symbol-tables \ |
| 5 ; RUN: | pnacl-bccompress \ | 5 ; RUN: | pnacl-bccompress \ |
| 6 ; RUN: | pnacl-thaw -allow-local-symbol-tables \ | 6 ; RUN: | pnacl-thaw -allow-local-symbol-tables \ |
| 7 ; RUN: | llvm-dis - | FileCheck %s | 7 ; RUN: | llvm-dis - | FileCheck %s |
| 8 | 8 |
| 9 ; Test 2: Show that both the precompressed, and the compressed versions | 9 ; Test 2: Show that both the precompressed, and the compressed versions |
| 10 ; of the bitcode contain the same records. | 10 ; of the bitcode contain the same records. |
| (...skipping 305 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 316 ; CHECK-NEXT: ret void | 316 ; CHECK-NEXT: ret void |
| 317 ; CHECK-NEXT: } | 317 ; CHECK-NEXT: } |
| 318 | 318 |
| 319 define void @PhiBackwardRefs(i1) { | 319 define void @PhiBackwardRefs(i1) { |
| 320 %2 = alloca i8, i32 4, align 8 | 320 %2 = alloca i8, i32 4, align 8 |
| 321 %3 = alloca i8, i32 4, align 8 | 321 %3 = alloca i8, i32 4, align 8 |
| 322 br i1 %0, label %true, label %false | 322 br i1 %0, label %true, label %false |
| 323 | 323 |
| 324 true: ; preds = %1 | 324 true: ; preds = %1 |
| 325 %4 = bitcast i8* %2 to i32* | 325 %4 = bitcast i8* %2 to i32* |
| 326 %5 = load i32* %4 | 326 %5 = load i32, i32* %4 |
| 327 %6 = ptrtoint i8* %3 to i32 | 327 %6 = ptrtoint i8* %3 to i32 |
| 328 br label %merge | 328 br label %merge |
| 329 | 329 |
| 330 false: ; preds = %1 | 330 false: ; preds = %1 |
| 331 %7 = bitcast i8* %2 to i32* | 331 %7 = bitcast i8* %2 to i32* |
| 332 %8 = load i32* %7 | 332 %8 = load i32, i32* %7 |
| 333 %9 = ptrtoint i8* %3 to i32 | 333 %9 = ptrtoint i8* %3 to i32 |
| 334 br label %merge | 334 br label %merge |
| 335 | 335 |
| 336 merge: ; preds = %false, %true | 336 merge: ; preds = %false, %true |
| 337 %10 = phi i32 [ %6, %true ], [ %9, %false ] | 337 %10 = phi i32 [ %6, %true ], [ %9, %false ] |
| 338 %11 = phi i32 [ %5, %true ], [ %8, %false ] | 338 %11 = phi i32 [ %5, %true ], [ %8, %false ] |
| 339 ret void | 339 ret void |
| 340 } | 340 } |
| 341 | 341 |
| 342 ; CHECK: define void @PhiBackwardRefs(i1) { | 342 ; CHECK: define void @PhiBackwardRefs(i1) { |
| 343 ; CHECK-NEXT: %2 = alloca i8, i32 4, align 8 | 343 ; CHECK-NEXT: %2 = alloca i8, i32 4, align 8 |
| 344 ; CHECK-NEXT: %3 = alloca i8, i32 4, align 8 | 344 ; CHECK-NEXT: %3 = alloca i8, i32 4, align 8 |
| 345 ; CHECK-NEXT: br i1 %0, label %true, label %false | 345 ; CHECK-NEXT: br i1 %0, label %true, label %false |
| 346 ; CHECK: true: ; preds = %1 | 346 ; CHECK: true: ; preds = %1 |
| 347 ; CHECK-NEXT: %4 = bitcast i8* %2 to i32* | 347 ; CHECK-NEXT: %4 = bitcast i8* %2 to i32* |
| 348 ; CHECK-NEXT: %5 = load i32* %4 | 348 ; CHECK-NEXT: %5 = load i32, i32* %4 |
| 349 ; CHECK-NEXT: %6 = ptrtoint i8* %3 to i32 | 349 ; CHECK-NEXT: %6 = ptrtoint i8* %3 to i32 |
| 350 ; CHECK-NEXT: br label %merge | 350 ; CHECK-NEXT: br label %merge |
| 351 ; CHECK: false: ; preds = %1 | 351 ; CHECK: false: ; preds = %1 |
| 352 ; CHECK-NEXT: %7 = bitcast i8* %2 to i32* | 352 ; CHECK-NEXT: %7 = bitcast i8* %2 to i32* |
| 353 ; CHECK-NEXT: %8 = load i32* %7 | 353 ; CHECK-NEXT: %8 = load i32, i32* %7 |
| 354 ; CHECK-NEXT: %9 = ptrtoint i8* %3 to i32 | 354 ; CHECK-NEXT: %9 = ptrtoint i8* %3 to i32 |
| 355 ; CHECK-NEXT: br label %merge | 355 ; CHECK-NEXT: br label %merge |
| 356 ; CHECK: merge: ; preds = %false
, %true | 356 ; CHECK: merge: ; preds = %false
, %true |
| 357 ; CHECK-NEXT: %10 = phi i32 [ %6, %true ], [ %9, %false ] | 357 ; CHECK-NEXT: %10 = phi i32 [ %6, %true ], [ %9, %false ] |
| 358 ; CHECK-NEXT: %11 = phi i32 [ %5, %true ], [ %8, %false ] | 358 ; CHECK-NEXT: %11 = phi i32 [ %5, %true ], [ %8, %false ] |
| 359 ; CHECK-NEXT: ret void | 359 ; CHECK-NEXT: ret void |
| 360 ; CHECK-NEXT: } | 360 ; CHECK-NEXT: } |
| 361 | 361 |
| 362 define void @PhiForwardRefs(i1) { | 362 define void @PhiForwardRefs(i1) { |
| 363 br label %start | 363 br label %start |
| 364 | 364 |
| 365 merge: ; preds = %false, %true | 365 merge: ; preds = %false, %true |
| 366 %2 = phi i32 [ %11, %true ], [ %11, %false ] | 366 %2 = phi i32 [ %11, %true ], [ %11, %false ] |
| 367 %3 = phi i32 [ %5, %true ], [ %7, %false ] | 367 %3 = phi i32 [ %5, %true ], [ %7, %false ] |
| 368 ret void | 368 ret void |
| 369 | 369 |
| 370 true: ; preds = %start | 370 true: ; preds = %start |
| 371 %4 = inttoptr i32 %9 to i32* | 371 %4 = inttoptr i32 %9 to i32* |
| 372 %5 = load i32* %4 | 372 %5 = load i32, i32* %4 |
| 373 br label %merge | 373 br label %merge |
| 374 | 374 |
| 375 false: ; preds = %start | 375 false: ; preds = %start |
| 376 %6 = inttoptr i32 %9 to i32* | 376 %6 = inttoptr i32 %9 to i32* |
| 377 %7 = load i32* %6 | 377 %7 = load i32, i32* %6 |
| 378 br label %merge | 378 br label %merge |
| 379 | 379 |
| 380 start: ; preds = %1 | 380 start: ; preds = %1 |
| 381 %8 = alloca i8, i32 4, align 8 | 381 %8 = alloca i8, i32 4, align 8 |
| 382 %9 = ptrtoint i8* %8 to i32 | 382 %9 = ptrtoint i8* %8 to i32 |
| 383 %10 = alloca i8, i32 4, align 8 | 383 %10 = alloca i8, i32 4, align 8 |
| 384 %11 = ptrtoint i8* %10 to i32 | 384 %11 = ptrtoint i8* %10 to i32 |
| 385 br i1 %0, label %true, label %false | 385 br i1 %0, label %true, label %false |
| 386 } | 386 } |
| 387 | 387 |
| 388 ; CHECK: define void @PhiForwardRefs(i1) { | 388 ; CHECK: define void @PhiForwardRefs(i1) { |
| 389 ; CHECK-NEXT: br label %start | 389 ; CHECK-NEXT: br label %start |
| 390 ; CHECK: merge: ; preds = %false
, %true | 390 ; CHECK: merge: ; preds = %false
, %true |
| 391 ; CHECK-NEXT: %2 = phi i32 [ %11, %true ], [ %11, %false ] | 391 ; CHECK-NEXT: %2 = phi i32 [ %11, %true ], [ %11, %false ] |
| 392 ; CHECK-NEXT: %3 = phi i32 [ %5, %true ], [ %7, %false ] | 392 ; CHECK-NEXT: %3 = phi i32 [ %5, %true ], [ %7, %false ] |
| 393 ; CHECK-NEXT: ret void | 393 ; CHECK-NEXT: ret void |
| 394 ; CHECK: true: ; preds = %start | 394 ; CHECK: true: ; preds = %start |
| 395 ; CHECK-NEXT: %4 = inttoptr i32 %9 to i32* | 395 ; CHECK-NEXT: %4 = inttoptr i32 %9 to i32* |
| 396 ; CHECK-NEXT: %5 = load i32* %4 | 396 ; CHECK-NEXT: %5 = load i32, i32* %4 |
| 397 ; CHECK-NEXT: br label %merge | 397 ; CHECK-NEXT: br label %merge |
| 398 ; CHECK: false: ; preds = %start | 398 ; CHECK: false: ; preds = %start |
| 399 ; CHECK-NEXT: %6 = inttoptr i32 %9 to i32* | 399 ; CHECK-NEXT: %6 = inttoptr i32 %9 to i32* |
| 400 ; CHECK-NEXT: %7 = load i32* %6 | 400 ; CHECK-NEXT: %7 = load i32, i32* %6 |
| 401 ; CHECK-NEXT: br label %merge | 401 ; CHECK-NEXT: br label %merge |
| 402 ; CHECK: start: ; preds = %1 | 402 ; CHECK: start: ; preds = %1 |
| 403 ; CHECK-NEXT: %8 = alloca i8, i32 4, align 8 | 403 ; CHECK-NEXT: %8 = alloca i8, i32 4, align 8 |
| 404 ; CHECK-NEXT: %9 = ptrtoint i8* %8 to i32 | 404 ; CHECK-NEXT: %9 = ptrtoint i8* %8 to i32 |
| 405 ; CHECK-NEXT: %10 = alloca i8, i32 4, align 8 | 405 ; CHECK-NEXT: %10 = alloca i8, i32 4, align 8 |
| 406 ; CHECK-NEXT: %11 = ptrtoint i8* %10 to i32 | 406 ; CHECK-NEXT: %11 = ptrtoint i8* %10 to i32 |
| 407 ; CHECK-NEXT: br i1 %0, label %true, label %false | 407 ; CHECK-NEXT: br i1 %0, label %true, label %false |
| 408 ; CHECK-NEXT: } | 408 ; CHECK-NEXT: } |
| 409 | 409 |
| 410 define void @PhiMergeCast(i1) { | 410 define void @PhiMergeCast(i1) { |
| 411 %2 = alloca i8, i32 4, align 8 | 411 %2 = alloca i8, i32 4, align 8 |
| 412 %3 = alloca i8, i32 4, align 8 | 412 %3 = alloca i8, i32 4, align 8 |
| 413 br i1 %0, label %true, label %false | 413 br i1 %0, label %true, label %false |
| 414 | 414 |
| 415 true: ; preds = %1 | 415 true: ; preds = %1 |
| 416 %4 = bitcast i8* %2 to i32* | 416 %4 = bitcast i8* %2 to i32* |
| 417 %5 = load i32* %4 | 417 %5 = load i32, i32* %4 |
| 418 %6 = ptrtoint i8* %3 to i32 | 418 %6 = ptrtoint i8* %3 to i32 |
| 419 %7 = add i32 %5, %6 | 419 %7 = add i32 %5, %6 |
| 420 br label %merge | 420 br label %merge |
| 421 | 421 |
| 422 false: ; preds = %1 | 422 false: ; preds = %1 |
| 423 %8 = bitcast i8* %2 to i32* | 423 %8 = bitcast i8* %2 to i32* |
| 424 %9 = load i32* %8 | 424 %9 = load i32, i32* %8 |
| 425 %10 = ptrtoint i8* %3 to i32 | 425 %10 = ptrtoint i8* %3 to i32 |
| 426 br label %merge | 426 br label %merge |
| 427 | 427 |
| 428 merge: ; preds = %false, %true | 428 merge: ; preds = %false, %true |
| 429 %11 = phi i32 [ %6, %true ], [ %10, %false ] | 429 %11 = phi i32 [ %6, %true ], [ %10, %false ] |
| 430 %12 = phi i32 [ %5, %true ], [ %9, %false ] | 430 %12 = phi i32 [ %5, %true ], [ %9, %false ] |
| 431 ret void | 431 ret void |
| 432 } | 432 } |
| 433 | 433 |
| 434 ; CHECK: define void @PhiMergeCast(i1) { | 434 ; CHECK: define void @PhiMergeCast(i1) { |
| 435 ; CHECK-NEXT: %2 = alloca i8, i32 4, align 8 | 435 ; CHECK-NEXT: %2 = alloca i8, i32 4, align 8 |
| 436 ; CHECK-NEXT: %3 = alloca i8, i32 4, align 8 | 436 ; CHECK-NEXT: %3 = alloca i8, i32 4, align 8 |
| 437 ; CHECK-NEXT: br i1 %0, label %true, label %false | 437 ; CHECK-NEXT: br i1 %0, label %true, label %false |
| 438 ; CHECK: true: ; preds = %1 | 438 ; CHECK: true: ; preds = %1 |
| 439 ; CHECK-NEXT: %4 = bitcast i8* %2 to i32* | 439 ; CHECK-NEXT: %4 = bitcast i8* %2 to i32* |
| 440 ; CHECK-NEXT: %5 = load i32* %4 | 440 ; CHECK-NEXT: %5 = load i32, i32* %4 |
| 441 ; CHECK-NEXT: %6 = ptrtoint i8* %3 to i32 | 441 ; CHECK-NEXT: %6 = ptrtoint i8* %3 to i32 |
| 442 ; CHECK-NEXT: %7 = add i32 %5, %6 | 442 ; CHECK-NEXT: %7 = add i32 %5, %6 |
| 443 ; CHECK-NEXT: br label %merge | 443 ; CHECK-NEXT: br label %merge |
| 444 ; CHECK: false: ; preds = %1 | 444 ; CHECK: false: ; preds = %1 |
| 445 ; CHECK-NEXT: %8 = bitcast i8* %2 to i32* | 445 ; CHECK-NEXT: %8 = bitcast i8* %2 to i32* |
| 446 ; CHECK-NEXT: %9 = load i32* %8 | 446 ; CHECK-NEXT: %9 = load i32, i32* %8 |
| 447 ; CHECK-NEXT: %10 = ptrtoint i8* %3 to i32 | 447 ; CHECK-NEXT: %10 = ptrtoint i8* %3 to i32 |
| 448 ; CHECK-NEXT: br label %merge | 448 ; CHECK-NEXT: br label %merge |
| 449 ; CHECK: merge: ; preds = %false
, %true | 449 ; CHECK: merge: ; preds = %false
, %true |
| 450 ; CHECK-NEXT: %11 = phi i32 [ %6, %true ], [ %10, %false ] | 450 ; CHECK-NEXT: %11 = phi i32 [ %6, %true ], [ %10, %false ] |
| 451 ; CHECK-NEXT: %12 = phi i32 [ %5, %true ], [ %9, %false ] | 451 ; CHECK-NEXT: %12 = phi i32 [ %5, %true ], [ %9, %false ] |
| 452 ; CHECK-NEXT: ret void | 452 ; CHECK-NEXT: ret void |
| 453 ; CHECK-NEXT: } | 453 ; CHECK-NEXT: } |
| 454 | 454 |
| 455 define void @LongReachingCasts(i1) { | 455 define void @LongReachingCasts(i1) { |
| 456 %2 = alloca i8, i32 4, align 8 | 456 %2 = alloca i8, i32 4, align 8 |
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| 989 ; DUMP-NEXT: op18=10 op19=4/> | 989 ; DUMP-NEXT: op18=10 op19=4/> |
| 990 ; DUMP-NEXT: <INST_BR op0=5/> | 990 ; DUMP-NEXT: <INST_BR op0=5/> |
| 991 ; DUMP-NEXT: <INST_BR op0=5/> | 991 ; DUMP-NEXT: <INST_BR op0=5/> |
| 992 ; DUMP-NEXT: <INST_BR op0=5/> | 992 ; DUMP-NEXT: <INST_BR op0=5/> |
| 993 ; DUMP-NEXT: <INST_BR op0=5/> | 993 ; DUMP-NEXT: <INST_BR op0=5/> |
| 994 ; DUMP-NEXT: <INST_RET/> | 994 ; DUMP-NEXT: <INST_RET/> |
| 995 ; DUMP-NEXT: </FUNCTION_BLOCK> | 995 ; DUMP-NEXT: </FUNCTION_BLOCK> |
| 996 ; DUMP-NEXT:</MODULE_BLOCK> | 996 ; DUMP-NEXT:</MODULE_BLOCK> |
| 997 | 997 |
| 998 | 998 |
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