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1 ; RUN: pnacl-llc -mtriple=armv7-unknown-nacl -filetype=obj %s -o - \ | 1 ; RUN: pnacl-llc -mtriple=armv7-unknown-nacl -filetype=obj %s -o - \ |
2 ; RUN: | llvm-objdump -disassemble -triple armv7 - | FileCheck %s | 2 ; RUN: | llvm-objdump -disassemble -triple armv7 - | FileCheck %s |
3 | 3 |
4 define void @foo(i32* %input, i32* %output) nounwind { | 4 define void @foo(i32* %input, i32* %output) nounwind { |
5 entry: | 5 entry: |
6 %input.addr = alloca i32*, align 4 | 6 %input.addr = alloca i32*, align 4 |
7 %output.addr = alloca i32*, align 4 | 7 %output.addr = alloca i32*, align 4 |
8 store i32* %input, i32** %input.addr, align 4 | 8 store i32* %input, i32** %input.addr, align 4 |
9 store i32* %output, i32** %output.addr, align 4 | 9 store i32* %output, i32** %output.addr, align 4 |
10 %0 = load i32** %input.addr, align 4 | 10 %0 = load i32*, i32** %input.addr, align 4 |
11 %1 = load i32* %0, align 4 | 11 %1 = load i32, i32* %0, align 4 |
12 | 12 |
13 ; CHECK: bic r0, r0, #3221225472 | 13 ; CHECK: bic r0, r0, #-1073741824 |
14 ; CHECK-NEXT: ldr r0, [r0] | 14 ; CHECK-NEXT: ldr r0, [r0] |
15 | 15 |
16 %add = add nsw i32 %1, 4 | 16 %add = add nsw i32 %1, 4 |
17 %2 = load i32** %output.addr, align 4 | 17 %2 = load i32*, i32** %output.addr, align 4 |
18 store i32 %add, i32* %2, align 4 | 18 store i32 %add, i32* %2, align 4 |
19 | 19 |
20 ; CHECK: bic r1, r1, #3221225472 | 20 ; CHECK: bic r1, r1, #-1073741824 |
21 ; CHECK-NEXT: str r0, [r1] | 21 ; CHECK-NEXT: str r0, [r1] |
22 | 22 |
23 ret void | 23 ret void |
24 } | 24 } |
25 | 25 |
26 | 26 |
27 | 27 |
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