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1 ; RUN: pnacl-llc -mtriple=armv7-unknown-nacl -mattr=+neon -filetype=obj %s -o -
\ | 1 ; RUN: pnacl-llc -mtriple=armv7-unknown-nacl -mattr=+neon -filetype=obj %s -o -
\ |
2 ; RUN: | llvm-objdump -disassemble -triple armv7 - | FileCheck %s | 2 ; RUN: | llvm-objdump -disassemble -triple armv7 - | FileCheck %s |
3 | 3 |
4 define void @vst2i8(i8* %A, <8 x i8>* %B) nounwind { | 4 define void @vst2i8(i8* %A, <8 x i8>* %B) nounwind { |
5 %tmp1 = load <8 x i8>* %B | 5 %tmp1 = load <8 x i8>, <8 x i8>* %B |
6 call void @llvm.arm.neon.vst2.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32
8) | 6 call void @llvm.arm.neon.vst2.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32
8) |
7 ; CHECK: bic r0, r0, #3221225472 | 7 ; CHECK: bic r0, r0, #-1073741824 |
8 ; CHECK-NEXT: vst2.8 {{{d[0-9]+, d[0-9]+}}}, [r0:64] | 8 ; CHECK-NEXT: vst2.{{[0-9]+}} {{{d[0-9]+, d[0-9]+}}}, [r0:64] |
9 ret void | 9 ret void |
10 } | 10 } |
11 | 11 |
12 define void @vst2i16(i16* %A, <4 x i16>* %B) nounwind { | 12 define void @vst2i16(i16* %A, <4 x i16>* %B) nounwind { |
13 %tmp0 = bitcast i16* %A to i8* | 13 %tmp0 = bitcast i16* %A to i8* |
14 %tmp1 = load <4 x i16>* %B | 14 %tmp1 = load <4 x i16>, <4 x i16>* %B |
15 call void @llvm.arm.neon.vst2.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp
1, i32 32) | 15 call void @llvm.arm.neon.vst2.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp
1, i32 32) |
16 ; CHECK: bic r0, r0, #3221225472 | 16 ; CHECK: bic r0, r0, #-1073741824 |
17 ; CHECK-NEXT: vst2.16 {{{d[0-9]+, d[0-9]+}}}, [r0:128] | 17 ; CHECK-NEXT: vst2.{{[0-9]+}} {{{d[0-9]+, d[0-9]+}}}, [r0:128] |
18 ret void | 18 ret void |
19 } | 19 } |
20 | 20 |
21 define void @vst2i32(i32* %A, <2 x i32>* %B) nounwind { | 21 define void @vst2i32(i32* %A, <2 x i32>* %B) nounwind { |
22 %tmp0 = bitcast i32* %A to i8* | 22 %tmp0 = bitcast i32* %A to i8* |
23 %tmp1 = load <2 x i32>* %B | 23 %tmp1 = load <2 x i32>, <2 x i32>* %B |
24 call void @llvm.arm.neon.vst2.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp
1, i32 1) | 24 call void @llvm.arm.neon.vst2.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp
1, i32 1) |
25 ; CHECK: bic r0, r0, #3221225472 | 25 ; CHECK: bic r0, r0, #-1073741824 |
26 ; CHECK-NEXT: vst2.32 {{{d[0-9]+, d[0-9]+}}}, [r0] | 26 ; CHECK-NEXT: vst2.{{[0-9]+}} {{{d[0-9]+, d[0-9]+}}}, [r0] |
27 ret void | 27 ret void |
28 } | 28 } |
29 | 29 |
30 define void @vst2f(float* %A, <2 x float>* %B) nounwind { | 30 define void @vst2f(float* %A, <2 x float>* %B) nounwind { |
31 %tmp0 = bitcast float* %A to i8* | 31 %tmp0 = bitcast float* %A to i8* |
32 %tmp1 = load <2 x float>* %B | 32 %tmp1 = load <2 x float>, <2 x float>* %B |
33 call void @llvm.arm.neon.vst2.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float>
%tmp1, i32 1) | 33 call void @llvm.arm.neon.vst2.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float>
%tmp1, i32 1) |
34 ; CHECK: bic r0, r0, #3221225472 | 34 ; CHECK: bic r0, r0, #-1073741824 |
35 ; CHECK-NEXT: vst2.32 {{{d[0-9]+, d[0-9]+}}}, [r0] | 35 ; CHECK-NEXT: vst2.{{[0-9]+}} {{{d[0-9]+, d[0-9]+}}}, [r0] |
36 ret void | 36 ret void |
37 } | 37 } |
38 | 38 |
39 define void @vst2Qi8(i8* %A, <16 x i8>* %B) nounwind { | 39 define void @vst2Qi8(i8* %A, <16 x i8>* %B) nounwind { |
40 %tmp1 = load <16 x i8>* %B | 40 %tmp1 = load <16 x i8>, <16 x i8>* %B |
41 ; CHECK: bic r1, r1, #3221225472 | 41 ; CHECK: bic r1, r1, #-1073741824 |
42 ; CHECK-NEXT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1] | 42 ; CHECK-NEXT: vld1.{{[0-9]+}} {d{{[0-9]+}}, d{{[0-9]+}}}, [r1] |
43 call void @llvm.arm.neon.vst2.v16i8(i8* %A, <16 x i8> %tmp1, <16 x i8> %tmp1,
i32 8) | 43 call void @llvm.arm.neon.vst2.v16i8(i8* %A, <16 x i8> %tmp1, <16 x i8> %tmp1,
i32 8) |
44 ; CHECK: bic r0, r0, #3221225472 | 44 ; CHECK: bic r0, r0, #-1073741824 |
45 ; CHECK-NEXT: vst2.8 {{{d[0-9]+, d[0-9]+, d[0-9]+, d[0-9]+}}}, [r0:64] | 45 ; CHECK-NEXT: vst2.{{[0-9]+}} {{{d[0-9]+, d[0-9]+, d[0-9]+, d[0-9]+}}}, [r0:6
4] |
46 ret void | 46 ret void |
47 } | 47 } |
48 | 48 |
49 define void @vst2Qi16(i16* %A, <8 x i16>* %B) nounwind { | 49 define void @vst2Qi16(i16* %A, <8 x i16>* %B) nounwind { |
50 %tmp0 = bitcast i16* %A to i8* | 50 %tmp0 = bitcast i16* %A to i8* |
51 %tmp1 = load <8 x i16>* %B | 51 %tmp1 = load <8 x i16>, <8 x i16>* %B |
52 ; CHECK: bic r1, r1, #3221225472 | 52 ; CHECK: bic r1, r1, #-1073741824 |
53 ; CHECK-NEXT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1] | 53 ; CHECK-NEXT: vld1.{{[0-9]+}} {d{{[0-9]+}}, d{{[0-9]+}}}, [r1] |
54 call void @llvm.arm.neon.vst2.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp
1, i32 16) | 54 call void @llvm.arm.neon.vst2.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp
1, i32 16) |
55 ; CHECK: bic r0, r0, #3221225472 | 55 ; CHECK: bic r0, r0, #-1073741824 |
56 ; CHECK-NEXT: vst2.16 {{{d[0-9]+, d[0-9]+, d[0-9]+, d[0-9]+}}}, [r0:128] | 56 ; CHECK-NEXT: vst2.{{[0-9]+}} {{{d[0-9]+, d[0-9]+, d[0-9]+, d[0-9]+}}}, [r0:1
28] |
57 ret void | 57 ret void |
58 } | 58 } |
59 | 59 |
60 define void @vst2Qi32(i32* %A, <4 x i32>* %B) nounwind { | 60 define void @vst2Qi32(i32* %A, <4 x i32>* %B) nounwind { |
61 %tmp0 = bitcast i32* %A to i8* | 61 %tmp0 = bitcast i32* %A to i8* |
62 %tmp1 = load <4 x i32>* %B | 62 %tmp1 = load <4 x i32>, <4 x i32>* %B |
63 ; CHECK: bic r1, r1, #3221225472 | 63 ; CHECK: bic r1, r1, #-1073741824 |
64 ; CHECK-NEXT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1] | 64 ; CHECK-NEXT: vld1.{{[0-9]+}} {d{{[0-9]+}}, d{{[0-9]+}}}, [r1] |
65 call void @llvm.arm.neon.vst2.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp
1, i32 64) | 65 call void @llvm.arm.neon.vst2.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp
1, i32 64) |
66 ; CHECK: bic r0, r0, #3221225472 | 66 ; CHECK: bic r0, r0, #-1073741824 |
67 ; CHECK-NEXT: vst2.32 {{{d[0-9]+, d[0-9]+, d[0-9]+, d[0-9]+}}}, [r0:256] | 67 ; CHECK-NEXT: vst2.{{[0-9]+}} {{{d[0-9]+, d[0-9]+, d[0-9]+, d[0-9]+}}}, [r0:2
56] |
68 ret void | 68 ret void |
69 } | 69 } |
70 | 70 |
71 define void @vst2Qf(float* %A, <4 x float>* %B) nounwind { | 71 define void @vst2Qf(float* %A, <4 x float>* %B) nounwind { |
72 %tmp0 = bitcast float* %A to i8* | 72 %tmp0 = bitcast float* %A to i8* |
73 %tmp1 = load <4 x float>* %B | 73 %tmp1 = load <4 x float>, <4 x float>* %B |
74 ; CHECK: bic r1, r1, #3221225472 | 74 ; CHECK: bic r1, r1, #-1073741824 |
75 ; CHECK-NEXT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1] | 75 ; CHECK-NEXT: vld1.{{[0-9]+}} {d{{[0-9]+}}, d{{[0-9]+}}}, [r1] |
76 call void @llvm.arm.neon.vst2.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float>
%tmp1, i32 1) | 76 call void @llvm.arm.neon.vst2.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float>
%tmp1, i32 1) |
77 ; CHECK: bic r0, r0, #3221225472 | 77 ; CHECK: bic r0, r0, #-1073741824 |
78 ; CHECK-NEXT: vst2.32 {{{d[0-9]+, d[0-9]+, d[0-9]+, d[0-9]+}}}, [r0] | 78 ; CHECK-NEXT: vst2.{{[0-9]+}} {{{d[0-9]+, d[0-9]+, d[0-9]+, d[0-9]+}}}, [r0] |
79 ret void | 79 ret void |
80 } | 80 } |
81 | 81 |
82 ;Check for a post-increment updating store with register increment. | 82 ;Check for a post-increment updating store with register increment. |
83 define void @vst2i8_update(i8** %ptr, <8 x i8>* %B, i32 %inc) nounwind { | 83 define void @vst2i8_update(i8** %ptr, <8 x i8>* %B, i32 %inc) nounwind { |
84 ; CHECK: bic r1, r1, #3221225472 | 84 ; CHECK: bic r1, r1, #-1073741824 |
85 %A = load i8** %ptr | 85 %A = load i8*, i8** %ptr |
86 %tmp1 = load <8 x i8>* %B | 86 %tmp1 = load <8 x i8>, <8 x i8>* %B |
87 call void @llvm.arm.neon.vst2.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32
4) | 87 call void @llvm.arm.neon.vst2.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32
4) |
88 ; CHECK: bic r1, r1, #3221225472 | 88 ; CHECK: bic r1, r1, #-1073741824 |
89 ; CHECK-NEXT: vst2.8 {{{d[0-9]+, d[0-9]+}}}, [r1], r2 | 89 ; CHECK-NEXT: vst2.{{[0-9]+}} {{{d[0-9]+, d[0-9]+}}}, [r1], r2 |
90 %tmp2 = getelementptr i8* %A, i32 %inc | 90 %tmp2 = getelementptr i8, i8* %A, i32 %inc |
91 store i8* %tmp2, i8** %ptr | 91 store i8* %tmp2, i8** %ptr |
92 ret void | 92 ret void |
93 } | 93 } |
94 | 94 |
95 declare void @llvm.arm.neon.vst2.v8i8(i8*, <8 x i8>, <8 x i8>, i32) nounwind | 95 declare void @llvm.arm.neon.vst2.v8i8(i8*, <8 x i8>, <8 x i8>, i32) nounwind |
96 declare void @llvm.arm.neon.vst2.v4i16(i8*, <4 x i16>, <4 x i16>, i32) nounwind | 96 declare void @llvm.arm.neon.vst2.v4i16(i8*, <4 x i16>, <4 x i16>, i32) nounwind |
97 declare void @llvm.arm.neon.vst2.v2i32(i8*, <2 x i32>, <2 x i32>, i32) nounwind | 97 declare void @llvm.arm.neon.vst2.v2i32(i8*, <2 x i32>, <2 x i32>, i32) nounwind |
98 declare void @llvm.arm.neon.vst2.v2f32(i8*, <2 x float>, <2 x float>, i32) nounw
ind | 98 declare void @llvm.arm.neon.vst2.v2f32(i8*, <2 x float>, <2 x float>, i32) nounw
ind |
99 declare void @llvm.arm.neon.vst2.v1i64(i8*, <1 x i64>, <1 x i64>, i32) nounwind | 99 declare void @llvm.arm.neon.vst2.v1i64(i8*, <1 x i64>, <1 x i64>, i32) nounwind |
100 | 100 |
101 declare void @llvm.arm.neon.vst2.v16i8(i8*, <16 x i8>, <16 x i8>, i32) nounwind | 101 declare void @llvm.arm.neon.vst2.v16i8(i8*, <16 x i8>, <16 x i8>, i32) nounwind |
102 declare void @llvm.arm.neon.vst2.v8i16(i8*, <8 x i16>, <8 x i16>, i32) nounwind | 102 declare void @llvm.arm.neon.vst2.v8i16(i8*, <8 x i16>, <8 x i16>, i32) nounwind |
103 declare void @llvm.arm.neon.vst2.v4i32(i8*, <4 x i32>, <4 x i32>, i32) nounwind | 103 declare void @llvm.arm.neon.vst2.v4i32(i8*, <4 x i32>, <4 x i32>, i32) nounwind |
104 declare void @llvm.arm.neon.vst2.v4f32(i8*, <4 x float>, <4 x float>, i32) nounw
ind | 104 declare void @llvm.arm.neon.vst2.v4f32(i8*, <4 x float>, <4 x float>, i32) nounw
ind |
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