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Side by Side Diff: test/NaCl/ARM/neon-vld2-sandboxing.ll

Issue 1151093004: Changes from 3.7 merge to files not in upstream (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-llvm.git@master
Patch Set: Created 5 years, 7 months ago
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1 ; RUN: pnacl-llc -mtriple=armv7-unknown-nacl -mattr=+neon -filetype=obj %s -o - \ 1 ; RUN: pnacl-llc -mtriple=armv7-unknown-nacl -mattr=+neon -filetype=obj %s -o - \
2 ; RUN: | llvm-objdump -disassemble -triple armv7 - | FileCheck %s 2 ; RUN: | llvm-objdump -disassemble -triple armv7 - | FileCheck %s
3 3
4 %struct.__neon_int8x8x2_t = type { <8 x i8>, <8 x i8> } 4 %struct.__neon_int8x8x2_t = type { <8 x i8>, <8 x i8> }
5 %struct.__neon_int16x4x2_t = type { <4 x i16>, <4 x i16> } 5 %struct.__neon_int16x4x2_t = type { <4 x i16>, <4 x i16> }
6 %struct.__neon_int32x2x2_t = type { <2 x i32>, <2 x i32> } 6 %struct.__neon_int32x2x2_t = type { <2 x i32>, <2 x i32> }
7 %struct.__neon_float32x2x2_t = type { <2 x float>, <2 x float> } 7 %struct.__neon_float32x2x2_t = type { <2 x float>, <2 x float> }
8 %struct.__neon_int64x1x2_t = type { <1 x i64>, <1 x i64> } 8 %struct.__neon_int64x1x2_t = type { <1 x i64>, <1 x i64> }
9 9
10 %struct.__neon_int8x16x2_t = type { <16 x i8>, <16 x i8> } 10 %struct.__neon_int8x16x2_t = type { <16 x i8>, <16 x i8> }
(...skipping 10 matching lines...) Expand all
21 declare %struct.__neon_int8x16x2_t @llvm.arm.neon.vld2.v16i8(i8*, i32) nounwind readonly 21 declare %struct.__neon_int8x16x2_t @llvm.arm.neon.vld2.v16i8(i8*, i32) nounwind readonly
22 declare %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2.v8i16(i8*, i32) nounwind readonly 22 declare %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2.v8i16(i8*, i32) nounwind readonly
23 declare %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2.v4i32(i8*, i32) nounwind readonly 23 declare %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2.v4i32(i8*, i32) nounwind readonly
24 declare %struct.__neon_float32x4x2_t @llvm.arm.neon.vld2.v4f32(i8*, i32) nounwin d readonly 24 declare %struct.__neon_float32x4x2_t @llvm.arm.neon.vld2.v4f32(i8*, i32) nounwin d readonly
25 25
26 define <8 x i8> @vld2i8(i8* %A) nounwind { 26 define <8 x i8> @vld2i8(i8* %A) nounwind {
27 %tmp1 = call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2.v8i8(i8* %A, i32 8) 27 %tmp1 = call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2.v8i8(i8* %A, i32 8)
28 %tmp2 = extractvalue %struct.__neon_int8x8x2_t %tmp1, 0 28 %tmp2 = extractvalue %struct.__neon_int8x8x2_t %tmp1, 0
29 %tmp3 = extractvalue %struct.__neon_int8x8x2_t %tmp1, 1 29 %tmp3 = extractvalue %struct.__neon_int8x8x2_t %tmp1, 1
30 %tmp4 = add <8 x i8> %tmp2, %tmp3 30 %tmp4 = add <8 x i8> %tmp2, %tmp3
31 ; CHECK: bic r0, r0, #3221225472 31 ; CHECK: bic r0, r0, #-1073741824
32 ; CHECK: vld2.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0:64] 32 ; CHECK: vld2.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0:64]
33 ret <8 x i8> %tmp4 33 ret <8 x i8> %tmp4
34 } 34 }
35 35
36 define <4 x i16> @vld2i16(i16* %A) nounwind { 36 define <4 x i16> @vld2i16(i16* %A) nounwind {
37 %tmp0 = bitcast i16* %A to i8* 37 %tmp0 = bitcast i16* %A to i8*
38 %tmp1 = call %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2.v4i16(i8* %tmp0, i 32 32) 38 %tmp1 = call %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2.v4i16(i8* %tmp0, i 32 32)
39 %tmp2 = extractvalue %struct.__neon_int16x4x2_t %tmp1, 0 39 %tmp2 = extractvalue %struct.__neon_int16x4x2_t %tmp1, 0
40 %tmp3 = extractvalue %struct.__neon_int16x4x2_t %tmp1, 1 40 %tmp3 = extractvalue %struct.__neon_int16x4x2_t %tmp1, 1
41 %tmp4 = add <4 x i16> %tmp2, %tmp3 41 %tmp4 = add <4 x i16> %tmp2, %tmp3
42 ; CHECK: bic r0, r0, #3221225472 42 ; CHECK: bic r0, r0, #-1073741824
43 ; CHECK: vld2.16 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0:128] 43 ; CHECK: vld2.16 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0:128]
44 ret <4 x i16> %tmp4 44 ret <4 x i16> %tmp4
45 } 45 }
46 46
47 define <2 x i32> @vld2i32(i32* %A) nounwind { 47 define <2 x i32> @vld2i32(i32* %A) nounwind {
48 %tmp0 = bitcast i32* %A to i8* 48 %tmp0 = bitcast i32* %A to i8*
49 %tmp1 = call %struct.__neon_int32x2x2_t @llvm.arm.neon.vld2.v2i32(i8* %tmp0, i 32 1) 49 %tmp1 = call %struct.__neon_int32x2x2_t @llvm.arm.neon.vld2.v2i32(i8* %tmp0, i 32 1)
50 %tmp2 = extractvalue %struct.__neon_int32x2x2_t %tmp1, 0 50 %tmp2 = extractvalue %struct.__neon_int32x2x2_t %tmp1, 0
51 %tmp3 = extractvalue %struct.__neon_int32x2x2_t %tmp1, 1 51 %tmp3 = extractvalue %struct.__neon_int32x2x2_t %tmp1, 1
52 %tmp4 = add <2 x i32> %tmp2, %tmp3 52 %tmp4 = add <2 x i32> %tmp2, %tmp3
53 ; CHECK: bic r0, r0, #3221225472 53 ; CHECK: bic r0, r0, #-1073741824
54 ; CHECK: vld2.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0] 54 ; CHECK: vld2.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0]
55 ret <2 x i32> %tmp4 55 ret <2 x i32> %tmp4
56 } 56 }
57 57
58 define <16 x i8> @vld2Qi8(i8* %A) nounwind { 58 define <16 x i8> @vld2Qi8(i8* %A) nounwind {
59 %tmp1 = call %struct.__neon_int8x16x2_t @llvm.arm.neon.vld2.v16i8(i8* %A, i32 8) 59 %tmp1 = call %struct.__neon_int8x16x2_t @llvm.arm.neon.vld2.v16i8(i8* %A, i32 8)
60 %tmp2 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 0 60 %tmp2 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 0
61 %tmp3 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 1 61 %tmp3 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 1
62 %tmp4 = add <16 x i8> %tmp2, %tmp3 62 %tmp4 = add <16 x i8> %tmp2, %tmp3
63 ; CHECK: bic r0, r0, #3221225472 63 ; CHECK: bic r0, r0, #-1073741824
64 ; CHECK: vld2.8 {d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}}, [r0:64] 64 ; CHECK: vld2.8 {d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}}, [r0:64]
65 ret <16 x i8> %tmp4 65 ret <16 x i8> %tmp4
66 } 66 }
67 67
68 define <8 x i16> @vld2Qi16(i16* %A) nounwind { 68 define <8 x i16> @vld2Qi16(i16* %A) nounwind {
69 %tmp0 = bitcast i16* %A to i8* 69 %tmp0 = bitcast i16* %A to i8*
70 %tmp1 = call %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2.v8i16(i8* %tmp0, i 32 16) 70 %tmp1 = call %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2.v8i16(i8* %tmp0, i 32 16)
71 %tmp2 = extractvalue %struct.__neon_int16x8x2_t %tmp1, 0 71 %tmp2 = extractvalue %struct.__neon_int16x8x2_t %tmp1, 0
72 %tmp3 = extractvalue %struct.__neon_int16x8x2_t %tmp1, 1 72 %tmp3 = extractvalue %struct.__neon_int16x8x2_t %tmp1, 1
73 %tmp4 = add <8 x i16> %tmp2, %tmp3 73 %tmp4 = add <8 x i16> %tmp2, %tmp3
74 ; CHECK: bic r0, r0, #3221225472 74 ; CHECK: bic r0, r0, #-1073741824
75 ; CHECK: vld2.16 {d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}}, [r0:128 ] 75 ; CHECK: vld2.16 {d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}}, [r0:128 ]
76 ret <8 x i16> %tmp4 76 ret <8 x i16> %tmp4
77 } 77 }
78 78
79 define <4 x i32> @vld2Qi32(i32* %A) nounwind { 79 define <4 x i32> @vld2Qi32(i32* %A) nounwind {
80 %tmp0 = bitcast i32* %A to i8* 80 %tmp0 = bitcast i32* %A to i8*
81 %tmp1 = call %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2.v4i32(i8* %tmp0, i 32 64) 81 %tmp1 = call %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2.v4i32(i8* %tmp0, i 32 64)
82 %tmp2 = extractvalue %struct.__neon_int32x4x2_t %tmp1, 0 82 %tmp2 = extractvalue %struct.__neon_int32x4x2_t %tmp1, 0
83 %tmp3 = extractvalue %struct.__neon_int32x4x2_t %tmp1, 1 83 %tmp3 = extractvalue %struct.__neon_int32x4x2_t %tmp1, 1
84 %tmp4 = add <4 x i32> %tmp2, %tmp3 84 %tmp4 = add <4 x i32> %tmp2, %tmp3
85 ; CHECK: bic r0, r0, #3221225472 85 ; CHECK: bic r0, r0, #-1073741824
86 ; CHECK: vld2.32 {d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}}, [r0:256 ] 86 ; CHECK: vld2.32 {d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}}, [r0:256 ]
87 ret <4 x i32> %tmp4 87 ret <4 x i32> %tmp4
88 } 88 }
89 89
90 define <16 x i8> @vld2Qi8_update(i8** %ptr, i32 %inc) nounwind { 90 define <16 x i8> @vld2Qi8_update(i8** %ptr, i32 %inc) nounwind {
91 %A = load i8** %ptr 91 %A = load i8*, i8** %ptr
92 %tmp1 = call %struct.__neon_int8x16x2_t @llvm.arm.neon.vld2.v16i8(i8* %A, i32 16) 92 %tmp1 = call %struct.__neon_int8x16x2_t @llvm.arm.neon.vld2.v16i8(i8* %A, i32 16)
93 %tmp2 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 0 93 %tmp2 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 0
94 %tmp3 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 1 94 %tmp3 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 1
95 %tmp4 = add <16 x i8> %tmp2, %tmp3 95 %tmp4 = add <16 x i8> %tmp2, %tmp3
96 ; CHECK: bic r2, r2, #3221225472 96 ; CHECK: bic r2, r2, #-1073741824
97 ; CHECK: vld2.8 {d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}}, [r2:128] , r1 97 ; CHECK: vld2.8 {d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}}, [r2:128] , r1
98 %tmp5 = getelementptr i8* %A, i32 %inc 98 %tmp5 = getelementptr i8, i8* %A, i32 %inc
99 store i8* %tmp5, i8** %ptr 99 store i8* %tmp5, i8** %ptr
100 ret <16 x i8> %tmp4 100 ret <16 x i8> %tmp4
101 } 101 }
102 102
103 define <2 x float> @vld2f_update(float** %ptr) nounwind { 103 define <2 x float> @vld2f_update(float** %ptr) nounwind {
104 %A = load float** %ptr 104 %A = load float*, float** %ptr
105 %tmp0 = bitcast float* %A to i8* 105 %tmp0 = bitcast float* %A to i8*
106 %tmp1 = call %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2.v2f32(i8* %tmp0, i32 1) 106 %tmp1 = call %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2.v2f32(i8* %tmp0, i32 1)
107 ; CHECK: bic r1, r1, #3221225472 107 ; CHECK: bic r1, r1, #-1073741824
108 ; CHECK: vld2.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1]! 108 ; CHECK: vld2.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1]!
109 %tmp2 = extractvalue %struct.__neon_float32x2x2_t %tmp1, 0 109 %tmp2 = extractvalue %struct.__neon_float32x2x2_t %tmp1, 0
110 %tmp3 = extractvalue %struct.__neon_float32x2x2_t %tmp1, 1 110 %tmp3 = extractvalue %struct.__neon_float32x2x2_t %tmp1, 1
111 %tmp4 = fadd <2 x float> %tmp2, %tmp3 111 %tmp4 = fadd <2 x float> %tmp2, %tmp3
112 %tmp5 = getelementptr float* %A, i32 4 112 %tmp5 = getelementptr float, float* %A, i32 4
113 store float* %tmp5, float** %ptr 113 store float* %tmp5, float** %ptr
114 ret <2 x float> %tmp4 114 ret <2 x float> %tmp4
115 } 115 }
116 116
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