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| 1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
| 2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
| 3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
| 4 // met: | 4 // met: |
| 5 // | 5 // |
| 6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
| 7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
| 8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
| 9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
| 10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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| 283 } | 283 } |
| 284 | 284 |
| 285 | 285 |
| 286 void MacroAssembler::Move(Register dst, Register src, Condition cond) { | 286 void MacroAssembler::Move(Register dst, Register src, Condition cond) { |
| 287 if (!dst.is(src)) { | 287 if (!dst.is(src)) { |
| 288 mov(dst, src, LeaveCC, cond); | 288 mov(dst, src, LeaveCC, cond); |
| 289 } | 289 } |
| 290 } | 290 } |
| 291 | 291 |
| 292 | 292 |
| 293 void MacroAssembler::Move(DwVfpRegister dst, DwVfpRegister src) { | 293 void MacroAssembler::Move(DoubleRegister dst, DoubleRegister src) { |
| 294 ASSERT(CpuFeatures::IsSupported(VFP2)); | 294 ASSERT(CpuFeatures::IsSupported(VFP2)); |
| 295 CpuFeatures::Scope scope(VFP2); | 295 CpuFeatures::Scope scope(VFP2); |
| 296 if (!dst.is(src)) { | 296 if (!dst.is(src)) { |
| 297 vmov(dst, src); | 297 vmov(dst, src); |
| 298 } | 298 } |
| 299 } | 299 } |
| 300 | 300 |
| 301 | 301 |
| 302 void MacroAssembler::And(Register dst, Register src1, const Operand& src2, | 302 void MacroAssembler::And(Register dst, Register src1, const Operand& src2, |
| 303 Condition cond) { | 303 Condition cond) { |
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| 636 | 636 |
| 637 void MacroAssembler::PopSafepointRegisters() { | 637 void MacroAssembler::PopSafepointRegisters() { |
| 638 const int num_unsaved = kNumSafepointRegisters - kNumSafepointSavedRegisters; | 638 const int num_unsaved = kNumSafepointRegisters - kNumSafepointSavedRegisters; |
| 639 ldm(ia_w, sp, kSafepointSavedRegisters); | 639 ldm(ia_w, sp, kSafepointSavedRegisters); |
| 640 add(sp, sp, Operand(num_unsaved * kPointerSize)); | 640 add(sp, sp, Operand(num_unsaved * kPointerSize)); |
| 641 } | 641 } |
| 642 | 642 |
| 643 | 643 |
| 644 void MacroAssembler::PushSafepointRegistersAndDoubles() { | 644 void MacroAssembler::PushSafepointRegistersAndDoubles() { |
| 645 PushSafepointRegisters(); | 645 PushSafepointRegisters(); |
| 646 sub(sp, sp, Operand(DwVfpRegister::NumAllocatableRegisters() * | 646 sub(sp, sp, Operand(DwVfpRegister::kNumAllocatableRegisters * |
| 647 kDoubleSize)); | 647 kDoubleSize)); |
| 648 for (int i = 0; i < DwVfpRegister::NumAllocatableRegisters(); i++) { | 648 for (int i = 0; i < DwVfpRegister::kNumAllocatableRegisters; i++) { |
| 649 vstr(DwVfpRegister::FromAllocationIndex(i), sp, i * kDoubleSize); | 649 vstr(DwVfpRegister::FromAllocationIndex(i), sp, i * kDoubleSize); |
| 650 } | 650 } |
| 651 } | 651 } |
| 652 | 652 |
| 653 | 653 |
| 654 void MacroAssembler::PopSafepointRegistersAndDoubles() { | 654 void MacroAssembler::PopSafepointRegistersAndDoubles() { |
| 655 for (int i = 0; i < DwVfpRegister::NumAllocatableRegisters(); i++) { | 655 for (int i = 0; i < DwVfpRegister::kNumAllocatableRegisters; i++) { |
| 656 vldr(DwVfpRegister::FromAllocationIndex(i), sp, i * kDoubleSize); | 656 vldr(DwVfpRegister::FromAllocationIndex(i), sp, i * kDoubleSize); |
| 657 } | 657 } |
| 658 add(sp, sp, Operand(DwVfpRegister::NumAllocatableRegisters() * | 658 add(sp, sp, Operand(DwVfpRegister::kNumAllocatableRegisters * |
| 659 kDoubleSize)); | 659 kDoubleSize)); |
| 660 PopSafepointRegisters(); | 660 PopSafepointRegisters(); |
| 661 } | 661 } |
| 662 | 662 |
| 663 void MacroAssembler::StoreToSafepointRegistersAndDoublesSlot(Register src, | 663 void MacroAssembler::StoreToSafepointRegistersAndDoublesSlot(Register src, |
| 664 Register dst) { | 664 Register dst) { |
| 665 str(src, SafepointRegistersAndDoublesSlot(dst)); | 665 str(src, SafepointRegistersAndDoublesSlot(dst)); |
| 666 } | 666 } |
| 667 | 667 |
| 668 | 668 |
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| 684 } | 684 } |
| 685 | 685 |
| 686 | 686 |
| 687 MemOperand MacroAssembler::SafepointRegisterSlot(Register reg) { | 687 MemOperand MacroAssembler::SafepointRegisterSlot(Register reg) { |
| 688 return MemOperand(sp, SafepointRegisterStackIndex(reg.code()) * kPointerSize); | 688 return MemOperand(sp, SafepointRegisterStackIndex(reg.code()) * kPointerSize); |
| 689 } | 689 } |
| 690 | 690 |
| 691 | 691 |
| 692 MemOperand MacroAssembler::SafepointRegistersAndDoublesSlot(Register reg) { | 692 MemOperand MacroAssembler::SafepointRegistersAndDoublesSlot(Register reg) { |
| 693 // General purpose registers are pushed last on the stack. | 693 // General purpose registers are pushed last on the stack. |
| 694 int doubles_size = DwVfpRegister::NumAllocatableRegisters() * kDoubleSize; | 694 int doubles_size = DwVfpRegister::kNumAllocatableRegisters * kDoubleSize; |
| 695 int register_offset = SafepointRegisterStackIndex(reg.code()) * kPointerSize; | 695 int register_offset = SafepointRegisterStackIndex(reg.code()) * kPointerSize; |
| 696 return MemOperand(sp, doubles_size + register_offset); | 696 return MemOperand(sp, doubles_size + register_offset); |
| 697 } | 697 } |
| 698 | 698 |
| 699 | 699 |
| 700 void MacroAssembler::Ldrd(Register dst1, Register dst2, | 700 void MacroAssembler::Ldrd(Register dst1, Register dst2, |
| 701 const MemOperand& src, Condition cond) { | 701 const MemOperand& src, Condition cond) { |
| 702 ASSERT(src.rm().is(no_reg)); | 702 ASSERT(src.rm().is(no_reg)); |
| 703 ASSERT(!dst1.is(lr)); // r14. | 703 ASSERT(!dst1.is(lr)); // r14. |
| 704 ASSERT_EQ(0, dst1.code() % 2); | 704 ASSERT_EQ(0, dst1.code() % 2); |
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| 960 #endif | 960 #endif |
| 961 | 961 |
| 962 // Tear down the exit frame, pop the arguments, and return. | 962 // Tear down the exit frame, pop the arguments, and return. |
| 963 mov(sp, Operand(fp)); | 963 mov(sp, Operand(fp)); |
| 964 ldm(ia_w, sp, fp.bit() | lr.bit()); | 964 ldm(ia_w, sp, fp.bit() | lr.bit()); |
| 965 if (argument_count.is_valid()) { | 965 if (argument_count.is_valid()) { |
| 966 add(sp, sp, Operand(argument_count, LSL, kPointerSizeLog2)); | 966 add(sp, sp, Operand(argument_count, LSL, kPointerSizeLog2)); |
| 967 } | 967 } |
| 968 } | 968 } |
| 969 | 969 |
| 970 void MacroAssembler::GetCFunctionDoubleResult(const DwVfpRegister dst) { | 970 void MacroAssembler::GetCFunctionDoubleResult(const DoubleRegister dst) { |
| 971 ASSERT(CpuFeatures::IsSupported(VFP2)); | 971 ASSERT(CpuFeatures::IsSupported(VFP2)); |
| 972 if (use_eabi_hardfloat()) { | 972 if (use_eabi_hardfloat()) { |
| 973 Move(dst, d0); | 973 Move(dst, d0); |
| 974 } else { | 974 } else { |
| 975 vmov(dst, r0, r1); | 975 vmov(dst, r0, r1); |
| 976 } | 976 } |
| 977 } | 977 } |
| 978 | 978 |
| 979 | 979 |
| 980 void MacroAssembler::SetCallKind(Register dst, CallKind call_kind) { | 980 void MacroAssembler::SetCallKind(Register dst, CallKind call_kind) { |
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| 2722 | 2722 |
| 2723 void MacroAssembler::CallRuntime(Runtime::FunctionId fid, int num_arguments) { | 2723 void MacroAssembler::CallRuntime(Runtime::FunctionId fid, int num_arguments) { |
| 2724 CallRuntime(Runtime::FunctionForId(fid), num_arguments); | 2724 CallRuntime(Runtime::FunctionForId(fid), num_arguments); |
| 2725 } | 2725 } |
| 2726 | 2726 |
| 2727 | 2727 |
| 2728 void MacroAssembler::CallRuntimeSaveDoubles(Runtime::FunctionId id) { | 2728 void MacroAssembler::CallRuntimeSaveDoubles(Runtime::FunctionId id) { |
| 2729 const Runtime::Function* function = Runtime::FunctionForId(id); | 2729 const Runtime::Function* function = Runtime::FunctionForId(id); |
| 2730 mov(r0, Operand(function->nargs)); | 2730 mov(r0, Operand(function->nargs)); |
| 2731 mov(r1, Operand(ExternalReference(function, isolate()))); | 2731 mov(r1, Operand(ExternalReference(function, isolate()))); |
| 2732 SaveFPRegsMode mode = CpuFeatures::IsSupported(VFP2) | 2732 CEntryStub stub(1, kSaveFPRegs); |
| 2733 ? kSaveFPRegs | |
| 2734 : kDontSaveFPRegs; | |
| 2735 CEntryStub stub(1, mode); | |
| 2736 CallStub(&stub); | 2733 CallStub(&stub); |
| 2737 } | 2734 } |
| 2738 | 2735 |
| 2739 | 2736 |
| 2740 void MacroAssembler::CallExternalReference(const ExternalReference& ext, | 2737 void MacroAssembler::CallExternalReference(const ExternalReference& ext, |
| 2741 int num_arguments) { | 2738 int num_arguments) { |
| 2742 mov(r0, Operand(num_arguments)); | 2739 mov(r0, Operand(num_arguments)); |
| 2743 mov(r1, Operand(ext)); | 2740 mov(r1, Operand(ext)); |
| 2744 | 2741 |
| 2745 CEntryStub stub(1); | 2742 CEntryStub stub(1); |
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| 3401 | 3398 |
| 3402 static const int kRegisterPassedArguments = 4; | 3399 static const int kRegisterPassedArguments = 4; |
| 3403 | 3400 |
| 3404 | 3401 |
| 3405 int MacroAssembler::CalculateStackPassedWords(int num_reg_arguments, | 3402 int MacroAssembler::CalculateStackPassedWords(int num_reg_arguments, |
| 3406 int num_double_arguments) { | 3403 int num_double_arguments) { |
| 3407 int stack_passed_words = 0; | 3404 int stack_passed_words = 0; |
| 3408 if (use_eabi_hardfloat()) { | 3405 if (use_eabi_hardfloat()) { |
| 3409 // In the hard floating point calling convention, we can use | 3406 // In the hard floating point calling convention, we can use |
| 3410 // all double registers to pass doubles. | 3407 // all double registers to pass doubles. |
| 3411 if (num_double_arguments > DoubleRegister::NumRegisters()) { | 3408 if (num_double_arguments > DoubleRegister::kNumRegisters) { |
| 3412 stack_passed_words += | 3409 stack_passed_words += |
| 3413 2 * (num_double_arguments - DoubleRegister::NumRegisters()); | 3410 2 * (num_double_arguments - DoubleRegister::kNumRegisters); |
| 3414 } | 3411 } |
| 3415 } else { | 3412 } else { |
| 3416 // In the soft floating point calling convention, every double | 3413 // In the soft floating point calling convention, every double |
| 3417 // argument is passed using two registers. | 3414 // argument is passed using two registers. |
| 3418 num_reg_arguments += 2 * num_double_arguments; | 3415 num_reg_arguments += 2 * num_double_arguments; |
| 3419 } | 3416 } |
| 3420 // Up to four simple arguments are passed in registers r0..r3. | 3417 // Up to four simple arguments are passed in registers r0..r3. |
| 3421 if (num_reg_arguments > kRegisterPassedArguments) { | 3418 if (num_reg_arguments > kRegisterPassedArguments) { |
| 3422 stack_passed_words += num_reg_arguments - kRegisterPassedArguments; | 3419 stack_passed_words += num_reg_arguments - kRegisterPassedArguments; |
| 3423 } | 3420 } |
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| 3444 } | 3441 } |
| 3445 } | 3442 } |
| 3446 | 3443 |
| 3447 | 3444 |
| 3448 void MacroAssembler::PrepareCallCFunction(int num_reg_arguments, | 3445 void MacroAssembler::PrepareCallCFunction(int num_reg_arguments, |
| 3449 Register scratch) { | 3446 Register scratch) { |
| 3450 PrepareCallCFunction(num_reg_arguments, 0, scratch); | 3447 PrepareCallCFunction(num_reg_arguments, 0, scratch); |
| 3451 } | 3448 } |
| 3452 | 3449 |
| 3453 | 3450 |
| 3454 void MacroAssembler::SetCallCDoubleArguments(DwVfpRegister dreg) { | 3451 void MacroAssembler::SetCallCDoubleArguments(DoubleRegister dreg) { |
| 3455 ASSERT(CpuFeatures::IsSupported(VFP2)); | 3452 ASSERT(CpuFeatures::IsSupported(VFP2)); |
| 3456 if (use_eabi_hardfloat()) { | 3453 if (use_eabi_hardfloat()) { |
| 3457 Move(d0, dreg); | 3454 Move(d0, dreg); |
| 3458 } else { | 3455 } else { |
| 3459 vmov(r0, r1, dreg); | 3456 vmov(r0, r1, dreg); |
| 3460 } | 3457 } |
| 3461 } | 3458 } |
| 3462 | 3459 |
| 3463 | 3460 |
| 3464 void MacroAssembler::SetCallCDoubleArguments(DwVfpRegister dreg1, | 3461 void MacroAssembler::SetCallCDoubleArguments(DoubleRegister dreg1, |
| 3465 DwVfpRegister dreg2) { | 3462 DoubleRegister dreg2) { |
| 3466 ASSERT(CpuFeatures::IsSupported(VFP2)); | 3463 ASSERT(CpuFeatures::IsSupported(VFP2)); |
| 3467 if (use_eabi_hardfloat()) { | 3464 if (use_eabi_hardfloat()) { |
| 3468 if (dreg2.is(d0)) { | 3465 if (dreg2.is(d0)) { |
| 3469 ASSERT(!dreg1.is(d1)); | 3466 ASSERT(!dreg1.is(d1)); |
| 3470 Move(d1, dreg2); | 3467 Move(d1, dreg2); |
| 3471 Move(d0, dreg1); | 3468 Move(d0, dreg1); |
| 3472 } else { | 3469 } else { |
| 3473 Move(d0, dreg1); | 3470 Move(d0, dreg1); |
| 3474 Move(d1, dreg2); | 3471 Move(d1, dreg2); |
| 3475 } | 3472 } |
| 3476 } else { | 3473 } else { |
| 3477 vmov(r0, r1, dreg1); | 3474 vmov(r0, r1, dreg1); |
| 3478 vmov(r2, r3, dreg2); | 3475 vmov(r2, r3, dreg2); |
| 3479 } | 3476 } |
| 3480 } | 3477 } |
| 3481 | 3478 |
| 3482 | 3479 |
| 3483 void MacroAssembler::SetCallCDoubleArguments(DwVfpRegister dreg, | 3480 void MacroAssembler::SetCallCDoubleArguments(DoubleRegister dreg, |
| 3484 Register reg) { | 3481 Register reg) { |
| 3485 ASSERT(CpuFeatures::IsSupported(VFP2)); | 3482 ASSERT(CpuFeatures::IsSupported(VFP2)); |
| 3486 if (use_eabi_hardfloat()) { | 3483 if (use_eabi_hardfloat()) { |
| 3487 Move(d0, dreg); | 3484 Move(d0, dreg); |
| 3488 Move(r0, reg); | 3485 Move(r0, reg); |
| 3489 } else { | 3486 } else { |
| 3490 Move(r2, reg); | 3487 Move(r2, reg); |
| 3491 vmov(r0, r1, dreg); | 3488 vmov(r0, r1, dreg); |
| 3492 } | 3489 } |
| 3493 } | 3490 } |
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| 3756 bind(&done); | 3753 bind(&done); |
| 3757 } | 3754 } |
| 3758 | 3755 |
| 3759 | 3756 |
| 3760 void MacroAssembler::ClampUint8(Register output_reg, Register input_reg) { | 3757 void MacroAssembler::ClampUint8(Register output_reg, Register input_reg) { |
| 3761 Usat(output_reg, 8, Operand(input_reg)); | 3758 Usat(output_reg, 8, Operand(input_reg)); |
| 3762 } | 3759 } |
| 3763 | 3760 |
| 3764 | 3761 |
| 3765 void MacroAssembler::ClampDoubleToUint8(Register result_reg, | 3762 void MacroAssembler::ClampDoubleToUint8(Register result_reg, |
| 3766 DwVfpRegister input_reg, | 3763 DoubleRegister input_reg, |
| 3767 DwVfpRegister temp_double_reg) { | 3764 DoubleRegister temp_double_reg) { |
| 3768 Label above_zero; | 3765 Label above_zero; |
| 3769 Label done; | 3766 Label done; |
| 3770 Label in_bounds; | 3767 Label in_bounds; |
| 3771 | 3768 |
| 3772 Vmov(temp_double_reg, 0.0); | 3769 Vmov(temp_double_reg, 0.0); |
| 3773 VFPCompareAndSetFlags(input_reg, temp_double_reg); | 3770 VFPCompareAndSetFlags(input_reg, temp_double_reg); |
| 3774 b(gt, &above_zero); | 3771 b(gt, &above_zero); |
| 3775 | 3772 |
| 3776 // Double value is less than zero, NaN or Inf, return 0. | 3773 // Double value is less than zero, NaN or Inf, return 0. |
| 3777 mov(result_reg, Operand(0)); | 3774 mov(result_reg, Operand(0)); |
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| 3916 void CodePatcher::EmitCondition(Condition cond) { | 3913 void CodePatcher::EmitCondition(Condition cond) { |
| 3917 Instr instr = Assembler::instr_at(masm_.pc_); | 3914 Instr instr = Assembler::instr_at(masm_.pc_); |
| 3918 instr = (instr & ~kCondMask) | cond; | 3915 instr = (instr & ~kCondMask) | cond; |
| 3919 masm_.emit(instr); | 3916 masm_.emit(instr); |
| 3920 } | 3917 } |
| 3921 | 3918 |
| 3922 | 3919 |
| 3923 } } // namespace v8::internal | 3920 } } // namespace v8::internal |
| 3924 | 3921 |
| 3925 #endif // V8_TARGET_ARCH_ARM | 3922 #endif // V8_TARGET_ARCH_ARM |
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