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Unified Diff: src/mips/constants-mips.h

Issue 1147493002: Reland "MIPS: Add float instructions and test coverage, part one" (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Bug fixed Created 5 years, 7 months ago
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Index: src/mips/constants-mips.h
diff --git a/src/mips/constants-mips.h b/src/mips/constants-mips.h
index 81f755b32006f47324513bbbfcd782e1b5dfe962..f3a331ef0253dda263143738f6871312be158d22 100644
--- a/src/mips/constants-mips.h
+++ b/src/mips/constants-mips.h
@@ -457,6 +457,14 @@ enum SecondaryField {
L = ((2 << 3) + 5) << 21,
PS = ((2 << 3) + 6) << 21,
// COP1 Encoding of Function Field When rs=S.
+ ADD_S = ((0 << 3) + 0),
+ SUB_S = ((0 << 3) + 1),
+ MUL_S = ((0 << 3) + 2),
+ DIV_S = ((0 << 3) + 3),
+ ABS_S = ((0 << 3) + 5),
+ SQRT_S = ((0 << 3) + 4),
+ MOV_S = ((0 << 3) + 6),
+ NEG_S = ((0 << 3) + 7),
ROUND_L_S = ((1 << 3) + 0),
TRUNC_L_S = ((1 << 3) + 1),
CEIL_L_S = ((1 << 3) + 2),
@@ -465,6 +473,8 @@ enum SecondaryField {
TRUNC_W_S = ((1 << 3) + 5),
CEIL_W_S = ((1 << 3) + 6),
FLOOR_W_S = ((1 << 3) + 7),
+ RECIP_S = ((2 << 3) + 5),
+ RSQRT_S = ((2 << 3) + 6),
CVT_D_S = ((4 << 3) + 1),
CVT_W_S = ((4 << 3) + 4),
CVT_L_S = ((4 << 3) + 5),
@@ -486,10 +496,8 @@ enum SecondaryField {
TRUNC_W_D = ((1 << 3) + 5),
CEIL_W_D = ((1 << 3) + 6),
FLOOR_W_D = ((1 << 3) + 7),
- MIN = ((3 << 3) + 4),
- MINA = ((3 << 3) + 5),
- MAX = ((3 << 3) + 6),
- MAXA = ((3 << 3) + 7),
+ RECIP_D = ((2 << 3) + 5),
+ RSQRT_D = ((2 << 3) + 6),
CVT_S_D = ((4 << 3) + 0),
CVT_W_D = ((4 << 3) + 4),
CVT_L_D = ((4 << 3) + 5),
@@ -543,8 +551,15 @@ enum SecondaryField {
CMP_SUGT = ((3 << 3) + 6), // Reserved, not implemented.
CMP_SOGT = ((3 << 3) + 7), // Reserved, not implemented.
+ MIN = ((3 << 3) + 4),
+ MINA = ((3 << 3) + 5),
+ MAX = ((3 << 3) + 6),
+ MAXA = ((3 << 3) + 7),
SEL = ((2 << 3) + 0),
+ MOVZ_C = ((2 << 3) + 2),
+ MOVN_C = ((2 << 3) + 3),
SELEQZ_C = ((2 << 3) + 4), // COP1 on FPR registers.
+ MOVF = ((2 << 3) + 1), // Function field for MOVT.fmt and MOVF.fmt
SELNEZ_C = ((2 << 3) + 7), // COP1 on FPR registers.
// COP1 Encoding of Function Field When rs=PS.
// COP1X Encoding of Function Field.
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