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Side by Side Diff: src/mips64/assembler-mips64.h

Issue 1147493002: Reland "MIPS: Add float instructions and test coverage, part one" (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Bug fixed Created 5 years, 7 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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874 void slti(Register rd, Register rs, int32_t j); 874 void slti(Register rd, Register rs, int32_t j);
875 void sltiu(Register rd, Register rs, int32_t j); 875 void sltiu(Register rd, Register rs, int32_t j);
876 876
877 // Conditional move. 877 // Conditional move.
878 void movz(Register rd, Register rs, Register rt); 878 void movz(Register rd, Register rs, Register rt);
879 void movn(Register rd, Register rs, Register rt); 879 void movn(Register rd, Register rs, Register rt);
880 void movt(Register rd, Register rs, uint16_t cc = 0); 880 void movt(Register rd, Register rs, uint16_t cc = 0);
881 void movf(Register rd, Register rs, uint16_t cc = 0); 881 void movf(Register rd, Register rs, uint16_t cc = 0);
882 882
883 void sel(SecondaryField fmt, FPURegister fd, FPURegister fs, FPURegister ft); 883 void sel(SecondaryField fmt, FPURegister fd, FPURegister fs, FPURegister ft);
884 void sel_s(FPURegister fd, FPURegister fs, FPURegister ft);
885 void sel_d(FPURegister fd, FPURegister fs, FPURegister ft);
884 void seleqz(Register rd, Register rs, Register rt); 886 void seleqz(Register rd, Register rs, Register rt);
885 void seleqz(SecondaryField fmt, FPURegister fd, FPURegister fs, 887 void seleqz(SecondaryField fmt, FPURegister fd, FPURegister fs,
886 FPURegister ft); 888 FPURegister ft);
887 void selnez(Register rs, Register rt, Register rd); 889 void selnez(Register rs, Register rt, Register rd);
888 void selnez(SecondaryField fmt, FPURegister fd, FPURegister fs, 890 void selnez(SecondaryField fmt, FPURegister fd, FPURegister fs,
889 FPURegister ft); 891 FPURegister ft);
892 void seleqz_d(FPURegister fd, FPURegister fs, FPURegister ft);
893 void seleqz_s(FPURegister fd, FPURegister fs, FPURegister ft);
894 void selnez_d(FPURegister fd, FPURegister fs, FPURegister ft);
895 void selnez_s(FPURegister fd, FPURegister fs, FPURegister ft);
896
897 void movz_s(FPURegister fd, FPURegister fs, Register rt);
898 void movz_d(FPURegister fd, FPURegister fs, Register rt);
899 void movt_s(FPURegister fd, FPURegister fs, uint16_t cc);
900 void movt_d(FPURegister fd, FPURegister fs, uint16_t cc);
901 void movf_s(FPURegister fd, FPURegister fs, uint16_t cc);
902 void movf_d(FPURegister fd, FPURegister fs, uint16_t cc);
903 void movn_s(FPURegister fd, FPURegister fs, Register rt);
904 void movn_d(FPURegister fd, FPURegister fs, Register rt);
890 // Bit twiddling. 905 // Bit twiddling.
891 void clz(Register rd, Register rs); 906 void clz(Register rd, Register rs);
892 void ins_(Register rt, Register rs, uint16_t pos, uint16_t size); 907 void ins_(Register rt, Register rs, uint16_t pos, uint16_t size);
893 void ext_(Register rt, Register rs, uint16_t pos, uint16_t size); 908 void ext_(Register rt, Register rs, uint16_t pos, uint16_t size);
894 void dext_(Register rt, Register rs, uint16_t pos, uint16_t size); 909 void dext_(Register rt, Register rs, uint16_t pos, uint16_t size);
895 910
896 // --------Coprocessor-instructions---------------- 911 // --------Coprocessor-instructions----------------
897 912
898 // Load, store, and move. 913 // Load, store, and move.
899 void lwc1(FPURegister fd, const MemOperand& src); 914 void lwc1(FPURegister fd, const MemOperand& src);
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919 void sub_s(FPURegister fd, FPURegister fs, FPURegister ft); 934 void sub_s(FPURegister fd, FPURegister fs, FPURegister ft);
920 void sub_d(FPURegister fd, FPURegister fs, FPURegister ft); 935 void sub_d(FPURegister fd, FPURegister fs, FPURegister ft);
921 void mul_s(FPURegister fd, FPURegister fs, FPURegister ft); 936 void mul_s(FPURegister fd, FPURegister fs, FPURegister ft);
922 void mul_d(FPURegister fd, FPURegister fs, FPURegister ft); 937 void mul_d(FPURegister fd, FPURegister fs, FPURegister ft);
923 void madd_d(FPURegister fd, FPURegister fr, FPURegister fs, FPURegister ft); 938 void madd_d(FPURegister fd, FPURegister fr, FPURegister fs, FPURegister ft);
924 void div_s(FPURegister fd, FPURegister fs, FPURegister ft); 939 void div_s(FPURegister fd, FPURegister fs, FPURegister ft);
925 void div_d(FPURegister fd, FPURegister fs, FPURegister ft); 940 void div_d(FPURegister fd, FPURegister fs, FPURegister ft);
926 void abs_s(FPURegister fd, FPURegister fs); 941 void abs_s(FPURegister fd, FPURegister fs);
927 void abs_d(FPURegister fd, FPURegister fs); 942 void abs_d(FPURegister fd, FPURegister fs);
928 void mov_d(FPURegister fd, FPURegister fs); 943 void mov_d(FPURegister fd, FPURegister fs);
944 void mov_s(FPURegister fd, FPURegister fs);
929 void neg_s(FPURegister fd, FPURegister fs); 945 void neg_s(FPURegister fd, FPURegister fs);
930 void neg_d(FPURegister fd, FPURegister fs); 946 void neg_d(FPURegister fd, FPURegister fs);
931 void sqrt_s(FPURegister fd, FPURegister fs); 947 void sqrt_s(FPURegister fd, FPURegister fs);
932 void sqrt_d(FPURegister fd, FPURegister fs); 948 void sqrt_d(FPURegister fd, FPURegister fs);
949 void rsqrt_s(FPURegister fd, FPURegister fs);
950 void rsqrt_d(FPURegister fd, FPURegister fs);
951 void recip_d(FPURegister fd, FPURegister fs);
952 void recip_s(FPURegister fd, FPURegister fs);
933 953
934 // Conversion. 954 // Conversion.
935 void cvt_w_s(FPURegister fd, FPURegister fs); 955 void cvt_w_s(FPURegister fd, FPURegister fs);
936 void cvt_w_d(FPURegister fd, FPURegister fs); 956 void cvt_w_d(FPURegister fd, FPURegister fs);
937 void trunc_w_s(FPURegister fd, FPURegister fs); 957 void trunc_w_s(FPURegister fd, FPURegister fs);
938 void trunc_w_d(FPURegister fd, FPURegister fs); 958 void trunc_w_d(FPURegister fd, FPURegister fs);
939 void round_w_s(FPURegister fd, FPURegister fs); 959 void round_w_s(FPURegister fd, FPURegister fs);
940 void round_w_d(FPURegister fd, FPURegister fs); 960 void round_w_d(FPURegister fd, FPURegister fs);
941 void floor_w_s(FPURegister fd, FPURegister fs); 961 void floor_w_s(FPURegister fd, FPURegister fs);
942 void floor_w_d(FPURegister fd, FPURegister fs); 962 void floor_w_d(FPURegister fd, FPURegister fs);
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1449 class EnsureSpace BASE_EMBEDDED { 1469 class EnsureSpace BASE_EMBEDDED {
1450 public: 1470 public:
1451 explicit EnsureSpace(Assembler* assembler) { 1471 explicit EnsureSpace(Assembler* assembler) {
1452 assembler->CheckBuffer(); 1472 assembler->CheckBuffer();
1453 } 1473 }
1454 }; 1474 };
1455 1475
1456 } } // namespace v8::internal 1476 } } // namespace v8::internal
1457 1477
1458 #endif // V8_ARM_ASSEMBLER_MIPS_H_ 1478 #endif // V8_ARM_ASSEMBLER_MIPS_H_
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