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Side by Side Diff: src/mips/assembler-mips.h

Issue 1147493002: Reland "MIPS: Add float instructions and test coverage, part one" (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Bug fixed Created 5 years, 7 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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846 void slti(Register rd, Register rs, int32_t j); 846 void slti(Register rd, Register rs, int32_t j);
847 void sltiu(Register rd, Register rs, int32_t j); 847 void sltiu(Register rd, Register rs, int32_t j);
848 848
849 // Conditional move. 849 // Conditional move.
850 void movz(Register rd, Register rs, Register rt); 850 void movz(Register rd, Register rs, Register rt);
851 void movn(Register rd, Register rs, Register rt); 851 void movn(Register rd, Register rs, Register rt);
852 void movt(Register rd, Register rs, uint16_t cc = 0); 852 void movt(Register rd, Register rs, uint16_t cc = 0);
853 void movf(Register rd, Register rs, uint16_t cc = 0); 853 void movf(Register rd, Register rs, uint16_t cc = 0);
854 854
855 void sel(SecondaryField fmt, FPURegister fd, FPURegister fs, FPURegister ft); 855 void sel(SecondaryField fmt, FPURegister fd, FPURegister fs, FPURegister ft);
856 void sel_s(FPURegister fd, FPURegister fs, FPURegister ft);
857 void sel_d(FPURegister fd, FPURegister fs, FPURegister ft);
856 void seleqz(Register rd, Register rs, Register rt); 858 void seleqz(Register rd, Register rs, Register rt);
857 void seleqz(SecondaryField fmt, FPURegister fd, FPURegister fs, 859 void seleqz(SecondaryField fmt, FPURegister fd, FPURegister fs,
858 FPURegister ft); 860 FPURegister ft);
859 void selnez(Register rd, Register rs, Register rt); 861 void selnez(Register rd, Register rs, Register rt);
860 void selnez(SecondaryField fmt, FPURegister fd, FPURegister fs, 862 void selnez(SecondaryField fmt, FPURegister fd, FPURegister fs,
861 FPURegister ft); 863 FPURegister ft);
864 void seleqz_d(FPURegister fd, FPURegister fs, FPURegister ft);
865 void seleqz_s(FPURegister fd, FPURegister fs, FPURegister ft);
866 void selnez_d(FPURegister fd, FPURegister fs, FPURegister ft);
867 void selnez_s(FPURegister fd, FPURegister fs, FPURegister ft);
862 868
869 void movz_s(FPURegister fd, FPURegister fs, Register rt);
870 void movz_d(FPURegister fd, FPURegister fs, Register rt);
871 void movt_s(FPURegister fd, FPURegister fs, uint16_t cc);
872 void movt_d(FPURegister fd, FPURegister fs, uint16_t cc);
873 void movf_s(FPURegister fd, FPURegister fs, uint16_t cc);
874 void movf_d(FPURegister fd, FPURegister fs, uint16_t cc);
875 void movn_s(FPURegister fd, FPURegister fs, Register rt);
876 void movn_d(FPURegister fd, FPURegister fs, Register rt);
863 // Bit twiddling. 877 // Bit twiddling.
864 void clz(Register rd, Register rs); 878 void clz(Register rd, Register rs);
865 void ins_(Register rt, Register rs, uint16_t pos, uint16_t size); 879 void ins_(Register rt, Register rs, uint16_t pos, uint16_t size);
866 void ext_(Register rt, Register rs, uint16_t pos, uint16_t size); 880 void ext_(Register rt, Register rs, uint16_t pos, uint16_t size);
867 881
868 // --------Coprocessor-instructions---------------- 882 // --------Coprocessor-instructions----------------
869 883
870 // Load, store, and move. 884 // Load, store, and move.
871 void lwc1(FPURegister fd, const MemOperand& src); 885 void lwc1(FPURegister fd, const MemOperand& src);
872 void ldc1(FPURegister fd, const MemOperand& src); 886 void ldc1(FPURegister fd, const MemOperand& src);
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889 void sub_s(FPURegister fd, FPURegister fs, FPURegister ft); 903 void sub_s(FPURegister fd, FPURegister fs, FPURegister ft);
890 void sub_d(FPURegister fd, FPURegister fs, FPURegister ft); 904 void sub_d(FPURegister fd, FPURegister fs, FPURegister ft);
891 void mul_s(FPURegister fd, FPURegister fs, FPURegister ft); 905 void mul_s(FPURegister fd, FPURegister fs, FPURegister ft);
892 void mul_d(FPURegister fd, FPURegister fs, FPURegister ft); 906 void mul_d(FPURegister fd, FPURegister fs, FPURegister ft);
893 void madd_d(FPURegister fd, FPURegister fr, FPURegister fs, FPURegister ft); 907 void madd_d(FPURegister fd, FPURegister fr, FPURegister fs, FPURegister ft);
894 void div_s(FPURegister fd, FPURegister fs, FPURegister ft); 908 void div_s(FPURegister fd, FPURegister fs, FPURegister ft);
895 void div_d(FPURegister fd, FPURegister fs, FPURegister ft); 909 void div_d(FPURegister fd, FPURegister fs, FPURegister ft);
896 void abs_s(FPURegister fd, FPURegister fs); 910 void abs_s(FPURegister fd, FPURegister fs);
897 void abs_d(FPURegister fd, FPURegister fs); 911 void abs_d(FPURegister fd, FPURegister fs);
898 void mov_d(FPURegister fd, FPURegister fs); 912 void mov_d(FPURegister fd, FPURegister fs);
913 void mov_s(FPURegister fd, FPURegister fs);
899 void neg_s(FPURegister fd, FPURegister fs); 914 void neg_s(FPURegister fd, FPURegister fs);
900 void neg_d(FPURegister fd, FPURegister fs); 915 void neg_d(FPURegister fd, FPURegister fs);
901 void sqrt_s(FPURegister fd, FPURegister fs); 916 void sqrt_s(FPURegister fd, FPURegister fs);
902 void sqrt_d(FPURegister fd, FPURegister fs); 917 void sqrt_d(FPURegister fd, FPURegister fs);
918 void rsqrt_s(FPURegister fd, FPURegister fs);
919 void rsqrt_d(FPURegister fd, FPURegister fs);
920 void recip_d(FPURegister fd, FPURegister fs);
921 void recip_s(FPURegister fd, FPURegister fs);
903 922
904 // Conversion. 923 // Conversion.
905 void cvt_w_s(FPURegister fd, FPURegister fs); 924 void cvt_w_s(FPURegister fd, FPURegister fs);
906 void cvt_w_d(FPURegister fd, FPURegister fs); 925 void cvt_w_d(FPURegister fd, FPURegister fs);
907 void trunc_w_s(FPURegister fd, FPURegister fs); 926 void trunc_w_s(FPURegister fd, FPURegister fs);
908 void trunc_w_d(FPURegister fd, FPURegister fs); 927 void trunc_w_d(FPURegister fd, FPURegister fs);
909 void round_w_s(FPURegister fd, FPURegister fs); 928 void round_w_s(FPURegister fd, FPURegister fs);
910 void round_w_d(FPURegister fd, FPURegister fs); 929 void round_w_d(FPURegister fd, FPURegister fs);
911 void floor_w_s(FPURegister fd, FPURegister fs); 930 void floor_w_s(FPURegister fd, FPURegister fs);
912 void floor_w_d(FPURegister fd, FPURegister fs); 931 void floor_w_d(FPURegister fd, FPURegister fs);
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1414 class EnsureSpace BASE_EMBEDDED { 1433 class EnsureSpace BASE_EMBEDDED {
1415 public: 1434 public:
1416 explicit EnsureSpace(Assembler* assembler) { 1435 explicit EnsureSpace(Assembler* assembler) {
1417 assembler->CheckBuffer(); 1436 assembler->CheckBuffer();
1418 } 1437 }
1419 }; 1438 };
1420 1439
1421 } } // namespace v8::internal 1440 } } // namespace v8::internal
1422 1441
1423 #endif // V8_ARM_ASSEMBLER_MIPS_H_ 1442 #endif // V8_ARM_ASSEMBLER_MIPS_H_
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