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| 1 ; Tests various aspects of x86 immediate encoding. Some encodings are shorter. | 1 ; Tests various aspects of x86 immediate encoding. Some encodings are shorter. |
| 2 ; For example, the encoding is shorter for 8-bit immediates or when using EAX. | 2 ; For example, the encoding is shorter for 8-bit immediates or when using EAX. |
| 3 ; This assumes that EAX is chosen as the first free register in O2 mode. | 3 ; This assumes that EAX is chosen as the first free register in O2 mode. |
| 4 | 4 |
| 5 ; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 | FileCheck %s | 5 ; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 | FileCheck %s |
| 6 | 6 |
| 7 define internal i32 @testXor8Imm8(i32 %arg) { | 7 define internal i32 @testXor8Imm8(i32 %arg) { |
| 8 entry: | 8 entry: |
| 9 %arg_i8 = trunc i32 %arg to i8 | 9 %arg_i8 = trunc i32 %arg to i8 |
| 10 %result_i8 = xor i8 %arg_i8, 127 | 10 %result_i8 = xor i8 %arg_i8, 127 |
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| 190 %result = zext i16 %result_i16 to i32 | 190 %result = zext i16 %result_i16 to i32 |
| 191 ret i32 %result | 191 ret i32 %result |
| 192 } | 192 } |
| 193 ; CHECK-LABEL: testMul16Imm8Neg | 193 ; CHECK-LABEL: testMul16Imm8Neg |
| 194 ; CHECK: 66 6b c0 91 imul ax,ax | 194 ; CHECK: 66 6b c0 91 imul ax,ax |
| 195 ; CHECK-NEXT: add ax,0x1 | 195 ; CHECK-NEXT: add ax,0x1 |
| 196 | 196 |
| 197 define internal i32 @testMul16Imm16(i32 %arg) { | 197 define internal i32 @testMul16Imm16(i32 %arg) { |
| 198 entry: | 198 entry: |
| 199 %arg_i16 = trunc i32 %arg to i16 | 199 %arg_i16 = trunc i32 %arg to i16 |
| 200 %tmp = mul i16 %arg_i16, 1024 | 200 %tmp = mul i16 %arg_i16, 1025 |
| 201 %result_i16 = add i16 %tmp, 1 | 201 %result_i16 = add i16 %tmp, 1 |
| 202 %result = zext i16 %result_i16 to i32 | 202 %result = zext i16 %result_i16 to i32 |
| 203 ret i32 %result | 203 ret i32 %result |
| 204 } | 204 } |
| 205 ; CHECK-LABEL: testMul16Imm16 | 205 ; CHECK-LABEL: testMul16Imm16 |
| 206 ; CHECK: 66 69 c0 00 04 imul ax,ax | 206 ; CHECK: 66 69 c0 01 04 imul ax,ax |
| 207 ; CHECK-NEXT: add ax,0x1 | 207 ; CHECK-NEXT: add ax,0x1 |
| 208 | 208 |
| 209 define internal i32 @testMul16Imm16Neg(i32 %arg) { | 209 define internal i32 @testMul16Imm16Neg(i32 %arg) { |
| 210 entry: | 210 entry: |
| 211 %arg_i16 = trunc i32 %arg to i16 | 211 %arg_i16 = trunc i32 %arg to i16 |
| 212 %tmp = mul i16 %arg_i16, -256 | 212 %tmp = mul i16 %arg_i16, -255 |
| 213 %result_i16 = add i16 %tmp, 1 | 213 %result_i16 = add i16 %tmp, 1 |
| 214 %result = zext i16 %result_i16 to i32 | 214 %result = zext i16 %result_i16 to i32 |
| 215 ret i32 %result | 215 ret i32 %result |
| 216 } | 216 } |
| 217 ; CHECK-LABEL: testMul16Imm16Neg | 217 ; CHECK-LABEL: testMul16Imm16Neg |
| 218 ; CHECK: 66 69 c0 00 ff imul ax,ax | 218 ; CHECK: 66 69 c0 01 ff imul ax,ax,0xff01 |
| 219 ; CHECK-NEXT: add ax,0x1 | 219 ; CHECK-NEXT: add ax,0x1 |
| 220 | 220 |
| 221 define internal i32 @testMul32Imm8(i32 %arg) { | 221 define internal i32 @testMul32Imm8(i32 %arg) { |
| 222 entry: | 222 entry: |
| 223 %result = mul i32 %arg, 99 | 223 %result = mul i32 %arg, 99 |
| 224 ret i32 %result | 224 ret i32 %result |
| 225 } | 225 } |
| 226 ; CHECK-LABEL: testMul32Imm8 | 226 ; CHECK-LABEL: testMul32Imm8 |
| 227 ; CHECK: 6b c0 63 imul eax,eax | 227 ; CHECK: 6b c0 63 imul eax,eax |
| 228 | 228 |
| 229 define internal i32 @testMul32Imm8Neg(i32 %arg) { | 229 define internal i32 @testMul32Imm8Neg(i32 %arg) { |
| 230 entry: | 230 entry: |
| 231 %result = mul i32 %arg, -111 | 231 %result = mul i32 %arg, -111 |
| 232 ret i32 %result | 232 ret i32 %result |
| 233 } | 233 } |
| 234 ; CHECK-LABEL: testMul32Imm8Neg | 234 ; CHECK-LABEL: testMul32Imm8Neg |
| 235 ; CHECK: 6b c0 91 imul eax,eax | 235 ; CHECK: 6b c0 91 imul eax,eax |
| 236 | 236 |
| 237 define internal i32 @testMul32Imm16(i32 %arg) { | 237 define internal i32 @testMul32Imm16(i32 %arg) { |
| 238 entry: | 238 entry: |
| 239 %result = mul i32 %arg, 1024 | 239 %result = mul i32 %arg, 1025 |
| 240 ret i32 %result | 240 ret i32 %result |
| 241 } | 241 } |
| 242 ; CHECK-LABEL: testMul32Imm16 | 242 ; CHECK-LABEL: testMul32Imm16 |
| 243 ; CHECK: 69 c0 00 04 00 00 imul eax,eax | 243 ; CHECK: 69 c0 01 04 00 00 imul eax,eax |
| 244 | 244 |
| 245 define internal i32 @testMul32Imm16Neg(i32 %arg) { | 245 define internal i32 @testMul32Imm16Neg(i32 %arg) { |
| 246 entry: | 246 entry: |
| 247 %result = mul i32 %arg, -256 | 247 %result = mul i32 %arg, -255 |
| 248 ret i32 %result | 248 ret i32 %result |
| 249 } | 249 } |
| 250 ; CHECK-LABEL: testMul32Imm16Neg | 250 ; CHECK-LABEL: testMul32Imm16Neg |
| 251 ; CHECK: 69 c0 00 ff ff ff imul eax,eax | 251 ; CHECK: 69 c0 01 ff ff ff imul eax,eax,0xffffff01 |
| 252 | 252 |
| 253 ; The GPR shift instructions either allow an 8-bit immediate or | 253 ; The GPR shift instructions either allow an 8-bit immediate or |
| 254 ; have a special encoding for "1". | 254 ; have a special encoding for "1". |
| 255 define internal i32 @testShl16Imm8(i32 %arg) { | 255 define internal i32 @testShl16Imm8(i32 %arg) { |
| 256 entry: | 256 entry: |
| 257 %arg_i16 = trunc i32 %arg to i16 | 257 %arg_i16 = trunc i32 %arg to i16 |
| 258 %tmp = shl i16 %arg_i16, 13 | 258 %tmp = shl i16 %arg_i16, 13 |
| 259 %result = zext i16 %tmp to i32 | 259 %result = zext i16 %tmp to i32 |
| 260 ret i32 %result | 260 ret i32 %result |
| 261 } | 261 } |
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| 299 %r4 = call i64 @llvm.ctlz.i64(i64 %w, i1 false) | 299 %r4 = call i64 @llvm.ctlz.i64(i64 %w, i1 false) |
| 300 %res1 = add i64 %r, %r2 | 300 %res1 = add i64 %r, %r2 |
| 301 %res2 = add i64 %r3, %r4 | 301 %res2 = add i64 %r3, %r4 |
| 302 %res = add i64 %res1, %res2 | 302 %res = add i64 %res1, %res2 |
| 303 ret i64 %res | 303 ret i64 %res |
| 304 } | 304 } |
| 305 ; CHECK-LABEL: test_via_ctlz_64 | 305 ; CHECK-LABEL: test_via_ctlz_64 |
| 306 ; CHECK-DAG: 85 c0 test eax,eax | 306 ; CHECK-DAG: 85 c0 test eax,eax |
| 307 ; CHECK-DAG: 85 db test ebx,ebx | 307 ; CHECK-DAG: 85 db test ebx,ebx |
| 308 ; CHECK-DAG: 85 f6 test esi,esi | 308 ; CHECK-DAG: 85 f6 test esi,esi |
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