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1 // Copyright 2010 the V8 project authors. All rights reserved. | 1 // Copyright 2010 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 // This file is an internal atomic implementation, use atomicops.h instead. | 5 // This file is an internal atomic implementation, use atomicops.h instead. |
6 // | 6 // |
7 // LinuxKernelCmpxchg and Barrier_AtomicIncrement are from Google Gears. | 7 // LinuxKernelCmpxchg and Barrier_AtomicIncrement are from Google Gears. |
8 | 8 |
9 #ifndef V8_BASE_ATOMICOPS_INTERNALS_ARM_GCC_H_ | 9 #ifndef V8_BASE_ATOMICOPS_INTERNALS_ARM_GCC_H_ |
10 #define V8_BASE_ATOMICOPS_INTERNALS_ARM_GCC_H_ | 10 #define V8_BASE_ATOMICOPS_INTERNALS_ARM_GCC_H_ |
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52 __cpu_membarrier(); | 52 __cpu_membarrier(); |
53 #else | 53 #else |
54 #error MemoryBarrier() is not implemented on this platform. | 54 #error MemoryBarrier() is not implemented on this platform. |
55 #endif | 55 #endif |
56 } | 56 } |
57 | 57 |
58 // An ARM toolchain would only define one of these depending on which | 58 // An ARM toolchain would only define one of these depending on which |
59 // variant of the target architecture is being used. This tests against | 59 // variant of the target architecture is being used. This tests against |
60 // any known ARMv6 or ARMv7 variant, where it is possible to directly | 60 // any known ARMv6 or ARMv7 variant, where it is possible to directly |
61 // use ldrex/strex instructions to implement fast atomic operations. | 61 // use ldrex/strex instructions to implement fast atomic operations. |
62 #if defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) || \ | 62 #if defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) || \ |
63 defined(__ARM_ARCH_7R__) || defined(__ARM_ARCH_7M__) || \ | 63 defined(__ARM_ARCH_7R__) || defined(__ARM_ARCH_7M__) || \ |
64 defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) || \ | 64 defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) || \ |
65 defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6Z__) || \ | 65 defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6Z__) || \ |
66 defined(__ARM_ARCH_6KZ__) || defined(__ARM_ARCH_6T2__) | 66 defined(__ARM_ARCH_6ZK__) || defined(__ARM_ARCH_6T2__) |
67 | 67 |
68 inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr, | 68 inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr, |
69 Atomic32 old_value, | 69 Atomic32 old_value, |
70 Atomic32 new_value) { | 70 Atomic32 new_value) { |
71 Atomic32 prev_value; | 71 Atomic32 prev_value; |
72 int reloop; | 72 int reloop; |
73 do { | 73 do { |
74 // The following is equivalent to: | 74 // The following is equivalent to: |
75 // | 75 // |
76 // prev_value = LDREX(ptr) | 76 // prev_value = LDREX(ptr) |
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292 | 292 |
293 inline void NoBarrier_Store(volatile Atomic8* ptr, Atomic8 value) { | 293 inline void NoBarrier_Store(volatile Atomic8* ptr, Atomic8 value) { |
294 *ptr = value; | 294 *ptr = value; |
295 } | 295 } |
296 | 296 |
297 inline Atomic8 NoBarrier_Load(volatile const Atomic8* ptr) { return *ptr; } | 297 inline Atomic8 NoBarrier_Load(volatile const Atomic8* ptr) { return *ptr; } |
298 | 298 |
299 } } // namespace v8::base | 299 } } // namespace v8::base |
300 | 300 |
301 #endif // V8_BASE_ATOMICOPS_INTERNALS_ARM_GCC_H_ | 301 #endif // V8_BASE_ATOMICOPS_INTERNALS_ARM_GCC_H_ |
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