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Unified Diff: src/mips/simulator-mips.h

Issue 1145223002: MIPS: Add float instructions and test coverage, part two (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Addressed comments Created 5 years, 7 months ago
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Index: src/mips/simulator-mips.h
diff --git a/src/mips/simulator-mips.h b/src/mips/simulator-mips.h
index de06200850b5c52a03ca7b0533dcd091270c14d3..0e9c2129837f3a9265c248ed0f37842bc15c2707 100644
--- a/src/mips/simulator-mips.h
+++ b/src/mips/simulator-mips.h
@@ -183,6 +183,12 @@ class Simulator {
bool set_fcsr_round64_error(float original, float rounded);
void round_according_to_fcsr(double toRound, double& rounded,
int32_t& rounded_int, double fs);
+ void round_according_to_fcsr(float toRound, float& rounded,
+ int32_t& rounded_int, float fs);
+ void round64_according_to_fcsr(double toRound, double& rounded,
+ int64_t& rounded_int, double fs);
+ void round64_according_to_fcsr(float toRound, float& rounded,
+ int64_t& rounded_int, float fs);
// Special case of set_register and get_register to access the raw PC value.
void set_pc(int32_t value);
int32_t get_pc() const;
@@ -278,7 +284,8 @@ class Simulator {
const int32_t& fs_reg, const int32_t& ft_reg,
const int32_t& fd_reg);
void DecodeTypeRegisterWRsType(Instruction* instr, int32_t& alu_out,
- const int32_t& fd_reg, const int32_t& fs_reg);
+ const int32_t& fd_reg, const int32_t& fs_reg,
+ const int32_t& ft_reg);
void DecodeTypeRegisterSRsType(Instruction* instr, const int32_t& ft_reg,
const int32_t& fs_reg, const int32_t& fd_reg);
void DecodeTypeRegisterLRsType(Instruction* instr, const int32_t& ft_reg,
@@ -312,7 +319,7 @@ class Simulator {
int32_t& alu_out);
void DecodeTypeRegisterSPECIAL3(Instruction* instr, const int32_t& rt_reg,
- int32_t& alu_out);
+ const int32_t& rd_reg, int32_t& alu_out);
// Helper function for DecodeTypeRegister.
void ConfigureTypeRegister(Instruction* instr,
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