MIPS: Add float instructions and test coverage, part two

src/mips64/simulator-mips64.h

 // Copyright 2011 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 
 // Declares a Simulator for MIPS instructions if we are not generating a native
 // MIPS binary. This Simulator allows us to run and debug MIPS code generation
 // on regular desktop machines.
 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro,
 // which will start execution in the Simulator or forwards to the real entry
@@ skipping 195 matching lines @@
   void set_fcsr_bit(uint32_t cc, bool value);
   bool test_fcsr_bit(uint32_t cc);
   bool set_fcsr_round_error(double original, double rounded);
   bool set_fcsr_round64_error(double original, double rounded);
   bool set_fcsr_round_error(float original, float rounded);
   bool set_fcsr_round64_error(float original, float rounded);
   void round_according_to_fcsr(double toRound, double& rounded,
                                int32_t& rounded_int, double fs);
   void round64_according_to_fcsr(double toRound, double& rounded,
                                  int64_t& rounded_int, double fs);
+  void round_according_to_fcsr(float toRound, float& rounded,
+                               int32_t& rounded_int, float fs);
+  void round64_according_to_fcsr(float toRound, float& rounded,
+                                 int64_t& rounded_int, float fs);
   void set_fcsr_rounding_mode(FPURoundingMode mode);
   unsigned int get_fcsr_rounding_mode();
   // Special case of set_register and get_register to access the raw PC value.
   void set_pc(int64_t value);
   int64_t get_pc() const;
 
   Address get_sp() {
     return reinterpret_cast<Address>(static_cast<intptr_t>(get_register(sp)));
   }
 
@@ skipping 114 matching lines @@
       const uint64_t& rt_u, const int64_t& rd_reg, const int32_t& fr_reg,
       const int32_t& fs_reg, const int32_t& ft_reg, const int64_t& fd_reg,
       int64_t& i64hilo, uint64_t& u64hilo, int64_t& alu_out, bool& do_interrupt,
       int64_t& current_pc, int64_t& next_pc, int64_t& return_addr_reg,
       int64_t& i128resultH, int64_t& i128resultL);
 
   void DecodeTypeRegisterSPECIAL2(Instruction* instr, const int64_t& rd_reg,
                                   int64_t& alu_out);
 
   void DecodeTypeRegisterSPECIAL3(Instruction* instr, const int64_t& rt_reg,
-                                  int64_t& alu_out);
+                                  const int64_t& rd_reg, int64_t& alu_out);
 
   void DecodeTypeRegisterSRsType(Instruction* instr, const int32_t& fs_reg,
                                  const int32_t& ft_reg, const int32_t& fd_reg);
 
   void DecodeTypeRegisterDRsType(Instruction* instr, const int32_t& fs_reg,
                                  const int32_t& ft_reg, const int32_t& fd_reg);
 
   void DecodeTypeRegisterWRsType(Instruction* instr, const int32_t& fs_reg,
-                                 const int32_t& fd_reg, int64_t& alu_out);
+                                 const int32_t& ft_reg, const int32_t& fd_reg,
+                                 int64_t& alu_out);
 
   void DecodeTypeRegisterLRsType(Instruction* instr, const int32_t& fs_reg,
                                  const int32_t& fd_reg, const int32_t& ft_reg);
   // Executing is handled based on the instruction type.
   void DecodeTypeRegister(Instruction* instr);
 
   // Helper function for DecodeTypeRegister.
   void ConfigureTypeRegister(Instruction* instr,
                              int64_t* alu_out,
                              int64_t* i64hilo,
@@ skipping 151 matching lines @@
 
   static inline void UnregisterCTryCatch() {
     Simulator::current(Isolate::Current())->PopAddress();
   }
 };
 
 } }  // namespace v8::internal
 
 #endif  // !defined(USE_SIMULATOR)
 #endif  // V8_MIPS_SIMULATOR_MIPS_H_