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Issue 1145223002: MIPS: Add float instructions and test coverage, part two (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Addressed comments Created 5 years, 7 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/v8.h" 5 #include "src/v8.h"
6 6
7 #if V8_TARGET_ARCH_MIPS64 7 #if V8_TARGET_ARCH_MIPS64
8 8
9 #include "src/mips64/constants-mips64.h" 9 #include "src/mips64/constants-mips64.h"
10 10
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283 return kRegisterType; 283 return kRegisterType;
284 default: 284 default:
285 return kUnsupported; 285 return kUnsupported;
286 } 286 }
287 break; 287 break;
288 case SPECIAL3: 288 case SPECIAL3:
289 switch (FunctionFieldRaw()) { 289 switch (FunctionFieldRaw()) {
290 case INS: 290 case INS:
291 case EXT: 291 case EXT:
292 case DEXT: 292 case DEXT:
293 case BITSWAP:
294 case DBITSWAP:
293 return kRegisterType; 295 return kRegisterType;
294 default: 296 default:
295 return kUnsupported; 297 return kUnsupported;
296 } 298 }
297 break; 299 break;
298 case COP1: // Coprocessor instructions. 300 case COP1: // Coprocessor instructions.
299 switch (RsFieldRawNoAssert()) { 301 switch (RsFieldRawNoAssert()) {
300 case BC1: // Branch on coprocessor condition. 302 case BC1: // Branch on coprocessor condition.
301 case BC1EQZ: 303 case BC1EQZ:
302 case BC1NEZ: 304 case BC1NEZ:
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356 default: 358 default:
357 return kUnsupported; 359 return kUnsupported;
358 } 360 }
359 return kUnsupported; 361 return kUnsupported;
360 } 362 }
361 363
362 364
363 } } // namespace v8::internal 365 } } // namespace v8::internal
364 366
365 #endif // V8_TARGET_ARCH_MIPS64 367 #endif // V8_TARGET_ARCH_MIPS64
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