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| 1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 | 5 |
| 6 // Declares a Simulator for MIPS instructions if we are not generating a native | 6 // Declares a Simulator for MIPS instructions if we are not generating a native |
| 7 // MIPS binary. This Simulator allows us to run and debug MIPS code generation | 7 // MIPS binary. This Simulator allows us to run and debug MIPS code generation |
| 8 // on regular desktop machines. | 8 // on regular desktop machines. |
| 9 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro, | 9 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro, |
| 10 // which will start execution in the Simulator or forwards to the real entry | 10 // which will start execution in the Simulator or forwards to the real entry |
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| 176 void set_fcsr_bit(uint32_t cc, bool value); | 176 void set_fcsr_bit(uint32_t cc, bool value); |
| 177 bool test_fcsr_bit(uint32_t cc); | 177 bool test_fcsr_bit(uint32_t cc); |
| 178 void set_fcsr_rounding_mode(FPURoundingMode mode); | 178 void set_fcsr_rounding_mode(FPURoundingMode mode); |
| 179 unsigned int get_fcsr_rounding_mode(); | 179 unsigned int get_fcsr_rounding_mode(); |
| 180 bool set_fcsr_round_error(double original, double rounded); | 180 bool set_fcsr_round_error(double original, double rounded); |
| 181 bool set_fcsr_round_error(float original, float rounded); | 181 bool set_fcsr_round_error(float original, float rounded); |
| 182 bool set_fcsr_round64_error(double original, double rounded); | 182 bool set_fcsr_round64_error(double original, double rounded); |
| 183 bool set_fcsr_round64_error(float original, float rounded); | 183 bool set_fcsr_round64_error(float original, float rounded); |
| 184 void round_according_to_fcsr(double toRound, double& rounded, | 184 void round_according_to_fcsr(double toRound, double& rounded, |
| 185 int32_t& rounded_int, double fs); | 185 int32_t& rounded_int, double fs); |
| 186 void round_according_to_fcsr(float toRound, float& rounded, |
| 187 int32_t& rounded_int, float fs); |
| 188 void round64_according_to_fcsr(double toRound, double& rounded, |
| 189 int64_t& rounded_int, double fs); |
| 190 void round64_according_to_fcsr(float toRound, float& rounded, |
| 191 int64_t& rounded_int, float fs); |
| 186 // Special case of set_register and get_register to access the raw PC value. | 192 // Special case of set_register and get_register to access the raw PC value. |
| 187 void set_pc(int32_t value); | 193 void set_pc(int32_t value); |
| 188 int32_t get_pc() const; | 194 int32_t get_pc() const; |
| 189 | 195 |
| 190 Address get_sp() { | 196 Address get_sp() { |
| 191 return reinterpret_cast<Address>(static_cast<intptr_t>(get_register(sp))); | 197 return reinterpret_cast<Address>(static_cast<intptr_t>(get_register(sp))); |
| 192 } | 198 } |
| 193 | 199 |
| 194 // Accessor to the internal simulator stack area. | 200 // Accessor to the internal simulator stack area. |
| 195 uintptr_t StackLimit() const; | 201 uintptr_t StackLimit() const; |
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| 271 inline int32_t SetDoubleLOW(double* addr); | 277 inline int32_t SetDoubleLOW(double* addr); |
| 272 | 278 |
| 273 // Executing is handled based on the instruction type. | 279 // Executing is handled based on the instruction type. |
| 274 void DecodeTypeRegister(Instruction* instr); | 280 void DecodeTypeRegister(Instruction* instr); |
| 275 | 281 |
| 276 // Called from DecodeTypeRegisterCOP1 | 282 // Called from DecodeTypeRegisterCOP1 |
| 277 void DecodeTypeRegisterDRsType(Instruction* instr, const int32_t& fr_reg, | 283 void DecodeTypeRegisterDRsType(Instruction* instr, const int32_t& fr_reg, |
| 278 const int32_t& fs_reg, const int32_t& ft_reg, | 284 const int32_t& fs_reg, const int32_t& ft_reg, |
| 279 const int32_t& fd_reg); | 285 const int32_t& fd_reg); |
| 280 void DecodeTypeRegisterWRsType(Instruction* instr, int32_t& alu_out, | 286 void DecodeTypeRegisterWRsType(Instruction* instr, int32_t& alu_out, |
| 281 const int32_t& fd_reg, const int32_t& fs_reg); | 287 const int32_t& fd_reg, const int32_t& fs_reg, |
| 288 const int32_t& ft_reg); |
| 282 void DecodeTypeRegisterSRsType(Instruction* instr, const int32_t& ft_reg, | 289 void DecodeTypeRegisterSRsType(Instruction* instr, const int32_t& ft_reg, |
| 283 const int32_t& fs_reg, const int32_t& fd_reg); | 290 const int32_t& fs_reg, const int32_t& fd_reg); |
| 284 void DecodeTypeRegisterLRsType(Instruction* instr, const int32_t& ft_reg, | 291 void DecodeTypeRegisterLRsType(Instruction* instr, const int32_t& ft_reg, |
| 285 const int32_t& fs_reg, const int32_t& fd_reg); | 292 const int32_t& fs_reg, const int32_t& fd_reg); |
| 286 | 293 |
| 287 // Functions called from DeocodeTypeRegister | 294 // Functions called from DeocodeTypeRegister |
| 288 void DecodeTypeRegisterCOP1( | 295 void DecodeTypeRegisterCOP1( |
| 289 Instruction* instr, const int32_t& rs_reg, const int32_t& rs, | 296 Instruction* instr, const int32_t& rs_reg, const int32_t& rs, |
| 290 const uint32_t& rs_u, const int32_t& rt_reg, const int32_t& rt, | 297 const uint32_t& rs_u, const int32_t& rt_reg, const int32_t& rt, |
| 291 const uint32_t& rt_u, const int32_t& rd_reg, const int32_t& fr_reg, | 298 const uint32_t& rt_u, const int32_t& rd_reg, const int32_t& fr_reg, |
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| 305 const uint32_t& rt_u, const int32_t& rd_reg, const int32_t& fr_reg, | 312 const uint32_t& rt_u, const int32_t& rd_reg, const int32_t& fr_reg, |
| 306 const int32_t& fs_reg, const int32_t& ft_reg, const int32_t& fd_reg, | 313 const int32_t& fs_reg, const int32_t& ft_reg, const int32_t& fd_reg, |
| 307 int64_t& i64hilo, uint64_t& u64hilo, int32_t& alu_out, bool& do_interrupt, | 314 int64_t& i64hilo, uint64_t& u64hilo, int32_t& alu_out, bool& do_interrupt, |
| 308 int32_t& current_pc, int32_t& next_pc, int32_t& return_addr_reg); | 315 int32_t& current_pc, int32_t& next_pc, int32_t& return_addr_reg); |
| 309 | 316 |
| 310 | 317 |
| 311 void DecodeTypeRegisterSPECIAL2(Instruction* instr, const int32_t& rd_reg, | 318 void DecodeTypeRegisterSPECIAL2(Instruction* instr, const int32_t& rd_reg, |
| 312 int32_t& alu_out); | 319 int32_t& alu_out); |
| 313 | 320 |
| 314 void DecodeTypeRegisterSPECIAL3(Instruction* instr, const int32_t& rt_reg, | 321 void DecodeTypeRegisterSPECIAL3(Instruction* instr, const int32_t& rt_reg, |
| 315 int32_t& alu_out); | 322 const int32_t& rd_reg, int32_t& alu_out); |
| 316 | 323 |
| 317 // Helper function for DecodeTypeRegister. | 324 // Helper function for DecodeTypeRegister. |
| 318 void ConfigureTypeRegister(Instruction* instr, | 325 void ConfigureTypeRegister(Instruction* instr, |
| 319 int32_t* alu_out, | 326 int32_t* alu_out, |
| 320 int64_t* i64hilo, | 327 int64_t* i64hilo, |
| 321 uint64_t* u64hilo, | 328 uint64_t* u64hilo, |
| 322 int32_t* next_pc, | 329 int32_t* next_pc, |
| 323 int32_t* return_addr_reg, | 330 int32_t* return_addr_reg, |
| 324 bool* do_interrupt); | 331 bool* do_interrupt); |
| 325 | 332 |
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| 462 | 469 |
| 463 static inline void UnregisterCTryCatch() { | 470 static inline void UnregisterCTryCatch() { |
| 464 Simulator::current(Isolate::Current())->PopAddress(); | 471 Simulator::current(Isolate::Current())->PopAddress(); |
| 465 } | 472 } |
| 466 }; | 473 }; |
| 467 | 474 |
| 468 } } // namespace v8::internal | 475 } } // namespace v8::internal |
| 469 | 476 |
| 470 #endif // !defined(USE_SIMULATOR) | 477 #endif // !defined(USE_SIMULATOR) |
| 471 #endif // V8_MIPS_SIMULATOR_MIPS_H_ | 478 #endif // V8_MIPS_SIMULATOR_MIPS_H_ |
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