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Unified Diff: tests_lit/llvm2ice_tests/branch-opt.ll

Issue 1144923008: Use ldr for movs out of stack slots (instead of mov reg, [sp/fp]). (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: scope better Created 5 years, 7 months ago
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Index: tests_lit/llvm2ice_tests/branch-opt.ll
diff --git a/tests_lit/llvm2ice_tests/branch-opt.ll b/tests_lit/llvm2ice_tests/branch-opt.ll
index eecd70fddaf0445d6d45b5ea734dc68b2bc1f111..fc0b2d8ff4a3541d6cc4b92ce3ecdb2f28678312 100644
--- a/tests_lit/llvm2ice_tests/branch-opt.ll
+++ b/tests_lit/llvm2ice_tests/branch-opt.ll
@@ -12,11 +12,15 @@
; TODO(jvoung): Stop skipping unimplemented parts (via --skip-unimplemented)
; once enough infrastructure is in. Also, switch to --filetype=obj
; when possible.
-; Also test Om1 when addProlog is done.
; RUN: %if --need=target_ARM32 --command %p2i --filetype=asm --assemble \
; RUN: --disassemble --target arm32 -i %s --args -O2 --skip-unimplemented \
; RUN: | %if --need=target_ARM32 --command FileCheck --check-prefix ARM32O2 %s
+; RUN: %if --need=target_ARM32 --command %p2i --filetype=asm --assemble \
+; RUN: --disassemble --target arm32 -i %s --args -Om1 --skip-unimplemented \
+; RUN: | %if --need=target_ARM32 --command FileCheck \
+; RUN: --check-prefix ARM32OM1 %s
+
declare void @dummy()
; An unconditional branch to the next block should be removed.
@@ -44,6 +48,11 @@ next:
; ARM32O2: bl {{.*}} dummy
; ARM32O2-NEXT: bl {{.*}} dummy
+; ARM32OM1-LABEL: testUncondToNextBlock
+; ARM32OM1: bl {{.*}} dummy
+; ARM32OM1-NEXT: b
+; ARM32OM1-NEXT: bl {{.*}} dummy
+
; For a conditional branch with a fallthrough to the next block, the
; fallthrough branch should be removed.
define void @testCondFallthroughToNextBlock(i32 %arg) {
@@ -88,6 +97,17 @@ target:
; ARM32O2-NEXT: bl
; ARM32O2-NEXT: bx lr
+; ARM32OM1-LABEL: testCondFallthroughToNextBlock
+; ARM32OM1: cmp {{.*}}, #123
+; ARM32OM1-NEXT: movge {{.*}}, #1
+; ARM32OM1: cmp {{.*}}, #0
+; ARM32OM1: bne
+; ARM32OM1: b
+; ARM32OM1: bl
+; ARM32OM1: bx lr
+; ARM32OM1: bl
+; ARM32OM1: bx lr
+
; For a conditional branch with the next block as the target and a
; different block as the fallthrough, the branch condition should be
; inverted, the fallthrough block changed to the target, and the
@@ -134,3 +154,14 @@ target:
; ARM32O2-NEXT: bx lr
; ARM32O2-NEXT: bl
; ARM32O2-NEXT: bx lr
+
+; ARM32OM1-LABEL: testCondTargetNextBlock
+; ARM32OM1: cmp {{.*}}, #123
+; ARM32OM1: movge {{.*}}, #1
+; ARM32OM1: cmp {{.*}}, #0
+; ARM32OM1: bne
+; ARM32OM1: b
+; ARM32OM1: bl
+; ARM32OM1: bx lr
+; ARM32OM1: bl
+; ARM32OM1: bx lr
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