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1 ; This is a basic test of the alloca instruction. | 1 ; This is a basic test of the alloca instruction. |
2 | 2 |
3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ | 3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ |
4 ; RUN: --target x8632 -i %s --args -O2 \ | 4 ; RUN: --target x8632 -i %s --args -O2 \ |
5 ; RUN: | %if --need=target_X8632 --command FileCheck %s | 5 ; RUN: | %if --need=target_X8632 --command FileCheck %s |
6 | 6 |
7 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ | 7 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ |
8 ; RUN: --target x8632 -i %s --args -Om1 \ | 8 ; RUN: --target x8632 -i %s --args -Om1 \ |
9 ; RUN: | %if --need=target_X8632 --command FileCheck %s | 9 ; RUN: | %if --need=target_X8632 --command FileCheck %s |
10 | 10 |
11 ; TODO(jvoung): Stop skipping unimplemented parts (via --skip-unimplemented) | 11 ; TODO(jvoung): Stop skipping unimplemented parts (via --skip-unimplemented) |
12 ; once enough infrastructure is in. Also, switch to --filetype=obj | 12 ; once enough infrastructure is in. Also, switch to --filetype=obj |
13 ; when possible. | 13 ; when possible. |
14 ; RUN: %if --need=target_ARM32 --command %p2i --filetype=asm --assemble \ | 14 ; RUN: %if --need=target_ARM32 --command %p2i --filetype=asm --assemble \ |
15 ; RUN: --disassemble --target arm32 -i %s --args -O2 --skip-unimplemented \ | 15 ; RUN: --disassemble --target arm32 -i %s --args -O2 --skip-unimplemented \ |
16 ; RUN: | %if --need=target_ARM32 --command FileCheck --check-prefix ARM32 %s | 16 ; RUN: | %if --need=target_ARM32 --command FileCheck --check-prefix ARM32 %s |
17 | 17 |
| 18 ; RUN: %if --need=target_ARM32 --command %p2i --filetype=asm --assemble \ |
| 19 ; RUN: --disassemble --target arm32 -i %s --args -Om1 --skip-unimplemented \ |
| 20 ; RUN: | %if --need=target_ARM32 --command FileCheck --check-prefix ARM32 %s |
| 21 |
18 define void @fixed_416_align_16(i32 %n) { | 22 define void @fixed_416_align_16(i32 %n) { |
19 entry: | 23 entry: |
20 %array = alloca i8, i32 416, align 16 | 24 %array = alloca i8, i32 416, align 16 |
21 %__2 = ptrtoint i8* %array to i32 | 25 %__2 = ptrtoint i8* %array to i32 |
22 call void @f1(i32 %__2) | 26 call void @f1(i32 %__2) |
23 ret void | 27 ret void |
24 } | 28 } |
25 ; CHECK-LABEL: fixed_416_align_16 | 29 ; CHECK-LABEL: fixed_416_align_16 |
26 ; CHECK: sub esp,0x1a0 | 30 ; CHECK: sub esp,0x1a0 |
27 ; CHECK: sub esp,0x10 | 31 ; CHECK: sub esp,0x10 |
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198 ; CHECK: add [[REG:.*]],0x1fffffff | 202 ; CHECK: add [[REG:.*]],0x1fffffff |
199 ; CHECK: and [[REG]],0xe0000000 | 203 ; CHECK: and [[REG]],0xe0000000 |
200 ; CHECK: sub esp,[[REG]] | 204 ; CHECK: sub esp,[[REG]] |
201 | 205 |
202 ; ARM32-LABEL: align512MB | 206 ; ARM32-LABEL: align512MB |
203 ; ARM32: and sp, sp, #-536870912 ; 0xe0000000 | 207 ; ARM32: and sp, sp, #-536870912 ; 0xe0000000 |
204 ; ARM32: mvn [[REG:.*]], #-536870912 ; 0xe0000000 | 208 ; ARM32: mvn [[REG:.*]], #-536870912 ; 0xe0000000 |
205 ; ARM32: add r0, r0, [[REG]] | 209 ; ARM32: add r0, r0, [[REG]] |
206 ; ARM32: and r0, r0, #-536870912 ; 0xe0000000 | 210 ; ARM32: and r0, r0, #-536870912 ; 0xe0000000 |
207 ; ARM32: sub sp, sp, r0 | 211 ; ARM32: sub sp, sp, r0 |
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