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Unified Diff: src/mips64/assembler-mips64.h

Issue 1144373003: MIPS: Implemented PC-relative instructions for R6. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Implementation BC and BALC. Created 5 years, 6 months ago
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Index: src/mips64/assembler-mips64.h
diff --git a/src/mips64/assembler-mips64.h b/src/mips64/assembler-mips64.h
index 1fea4001d1eda473ff497b4484bd4f690508bb72..7d2257f21bea86a62d7851e840bf5cecf2e45e91 100644
--- a/src/mips64/assembler-mips64.h
+++ b/src/mips64/assembler-mips64.h
@@ -634,6 +634,10 @@ class Assembler : public AssemblerBase {
void b(Label* L) { b(branch_offset(L, false)>>2); }
void bal(int16_t offset);
void bal(Label* L) { bal(branch_offset(L, false)>>2); }
+ void bc(int32_t offset);
+ void bc(Label* L) { bc(branch_offset(L, false) >> 2); }
+ void balc(int32_t offset);
+ void balc(Label* L) { balc(branch_offset(L, false) >> 2); }
void beq(Register rs, Register rt, int16_t offset);
void beq(Register rs, Register rt, Label* L) {
@@ -745,6 +749,8 @@ class Assembler : public AssemblerBase {
void jr(Register target);
void j_or_jr(int64_t target, Register rs);
void jal_or_jalr(int64_t target, Register rs);
+ void jic(Register rt, int16_t offset);
+ void jialc(Register rt, int16_t offset);
// -------Data-processing-instructions---------
@@ -847,6 +853,16 @@ class Assembler : public AssemblerBase {
void sd(Register rd, const MemOperand& rs);
+ // ---------PC-Relative-instructions-----------
+
+ void addiupc(Register rs, int32_t imm19);
+ void lwpc(Register rs, int32_t offset19);
+ void lwupc(Register rs, int32_t offset19);
+ void ldpc(Register rs, int32_t offset18);
+ void auipc(Register rs, int16_t imm16);
+ void aluipc(Register rs, int16_t imm16);
+
+
// ----------------Prefetch--------------------
void pref(int32_t hint, const MemOperand& rs);
@@ -909,6 +925,8 @@ class Assembler : public AssemblerBase {
void dext_(Register rt, Register rs, uint16_t pos, uint16_t size);
void bitswap(Register rd, Register rt);
void dbitswap(Register rd, Register rt);
+ void align(Register rd, Register rs, Register rt, uint8_t bp);
+ void dalign(Register rd, Register rs, Register rt, uint8_t bp);
// --------Coprocessor-instructions----------------
@@ -1381,6 +1399,8 @@ class Assembler : public AssemblerBase {
Register r1,
FPURegister r2,
int32_t j);
+ void GenInstrImmediate(Opcode opcode, Register rs, int32_t j);
+ void GenInstrImmediate(Opcode opcode, int32_t offset26);
void GenInstrJump(Opcode opcode,

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