Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(103)

Side by Side Diff: test/cctest/test-assembler-mips.cc

Issue 1144373003: MIPS: Implemented PC-relative instructions for R6. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 6 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
OLDNEW
1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 4244 matching lines...) Expand 10 before | Expand all | Expand 10 after
4255 __ lwc1(f2, MemOperand(a0, OFFSET_OF(Test, fOp2)) ); 4255 __ lwc1(f2, MemOperand(a0, OFFSET_OF(Test, fOp2)) );
4256 __ nop(); 4256 __ nop();
4257 __ div_s(f6, f4, f2); 4257 __ div_s(f6, f4, f2);
4258 __ swc1(f6, MemOperand(a0, OFFSET_OF(Test, fRes)) ); 4258 __ swc1(f6, MemOperand(a0, OFFSET_OF(Test, fRes)) );
4259 4259
4260 // Restore FCSR. 4260 // Restore FCSR.
4261 __ ctc1(a1, FCSR); 4261 __ ctc1(a1, FCSR);
4262 4262
4263 __ jr(ra); 4263 __ jr(ra);
4264 __ nop(); 4264 __ nop();
4265
4265 CodeDesc desc; 4266 CodeDesc desc;
4266 assm.GetCode(&desc); 4267 assm.GetCode(&desc);
4267 Handle<Code> code = isolate->factory()->NewCode( 4268 Handle<Code> code = isolate->factory()->NewCode(
4268 desc, Code::ComputeFlags(Code::STUB), Handle<Code>()); 4269 desc, Code::ComputeFlags(Code::STUB), Handle<Code>());
4270
4269 F3 f = FUNCTION_CAST<F3>(code->entry()); 4271 F3 f = FUNCTION_CAST<F3>(code->entry());
4270 4272
4271 (CALL_GENERATED_CODE(f, &test, 0, 0, 0, 0)); 4273 (CALL_GENERATED_CODE(f, &test, 0, 0, 0, 0));
4272 4274
4273 const int test_size = 3; 4275 const int test_size = 3;
4274 4276
4275 double dOp1[test_size] = { 4277 double dOp1[test_size] = {
4276 5.0, 4278 5.0,
4277 DBL_MAX, 4279 DBL_MAX,
4278 DBL_MAX, 4280 DBL_MAX,
(...skipping 57 matching lines...) Expand 10 before | Expand all | Expand 10 after
4336 test.dOp2 = -5.0; 4338 test.dOp2 = -5.0;
4337 test.fOp1 = std::numeric_limits<float>::quiet_NaN(); 4339 test.fOp1 = std::numeric_limits<float>::quiet_NaN();
4338 test.fOp2 = -5.0; 4340 test.fOp2 = -5.0;
4339 4341
4340 (CALL_GENERATED_CODE(f, &test, 0, 0, 0, 0)); 4342 (CALL_GENERATED_CODE(f, &test, 0, 0, 0, 0));
4341 CHECK_EQ(true, std::isnan(test.dRes)); 4343 CHECK_EQ(true, std::isnan(test.dRes));
4342 CHECK_EQ(true, std::isnan(test.fRes)); 4344 CHECK_EQ(true, std::isnan(test.fRes));
4343 } 4345 }
4344 4346
4345 4347
4348 uint32_t run_align(uint32_t rs, uint32_t rt, uint8_t bp) {
4349 Isolate* isolate = CcTest::i_isolate();
4350 HandleScope scope(isolate);
4351
4352 MacroAssembler assm(isolate, NULL, 0);
4353
4354 // ALIGN rd, rs, rt, bp
4355 __ align(v0, a0, a1, bp);
4356 __ jr(ra);
4357 __ nop();
4358
4359 CodeDesc desc;
4360 assm.GetCode(&desc);
4361 Handle<Code> code = isolate->factory()->NewCode(
4362 desc, Code::ComputeFlags(Code::STUB), Handle<Code>());
4363
4364 F2 f = FUNCTION_CAST<F2>(code->entry());
4365
4366 uint32_t rd =
4367 reinterpret_cast<uint32_t>(CALL_GENERATED_CODE(f, rs, rt, bp, 0, 0));
4368
4369 return rd;
4370 }
4371
4372
4373 TEST(r6_align) {
4374 if (IsMipsArchVariant(kMips32r6)) {
4375 CcTest::InitializeVM();
4376
4377 struct TestCaseAlign {
4378 uint32_t rd_expected;
4379 uint32_t rs;
4380 uint32_t rt;
4381 uint8_t bp;
4382 };
4383
4384 struct TestCaseAlign tc[] = {
4385 // rd_expected, rs, rt, bp
4386 { 0xaabbccdd, 0x11223344, 0xaabbccdd, 0 },
4387 { 0xbbccdd11, 0x11223344, 0xaabbccdd, 1 },
4388 { 0xccdd1122, 0x11223344, 0xaabbccdd, 2 },
4389 { 0xdd112233, 0x11223344, 0xaabbccdd, 3 },
4390 };
4391
4392 size_t nr_test_cases = sizeof(tc) / sizeof(TestCaseAlign);
4393 for (size_t i = 0; i < nr_test_cases; ++i) {
4394 CHECK_EQ(tc[i].rd_expected, run_align(tc[i].rs, tc[i].rt, tc[i].bp));
4395 }
4396 }
4397 }
4398
4399 uint32_t PC; // Program Counter
4400
4401 uint32_t run_aluipc(int16_t imm16) {
4402 Isolate* isolate = CcTest::i_isolate();
4403 HandleScope scope(isolate);
4404
4405 MacroAssembler assm(isolate, NULL, 0);
4406
4407 // ALUIPC rs, imm16
4408 __ aluipc(v0, imm16);
4409 __ jr(ra);
4410 __ nop();
4411
4412 CodeDesc desc;
4413 assm.GetCode(&desc);
4414 Handle<Code> code = isolate->factory()->NewCode(
4415 desc, Code::ComputeFlags(Code::STUB), Handle<Code>());
4416
4417 F2 f = FUNCTION_CAST<F2>(code->entry());
4418 PC = (uint32_t) f; // set program counter
4419
4420 uint32_t rs =
4421 reinterpret_cast<uint32_t>(CALL_GENERATED_CODE(f, imm16, 0, 0, 0, 0));
4422
4423 return rs;
4424 }
4425
4426
4427 TEST(r6_aluipc) {
4428 if (IsMipsArchVariant(kMips32r6)) {
4429 CcTest::InitializeVM();
4430
4431 struct TestCaseAluipc {
4432 uint32_t rs_expected;
4433 int16_t imm16;
4434 };
4435
4436 struct TestCaseAluipc tc[] = {
4437 // rs_expected has formal arguments
4438 // rs_expected, imm16
4439 { 0x0, -32768 }, // 0x8000
4440 { 0x0, -1 }, // 0xFFFF
4441 { 0x0, 0 },
4442 { 0x0, 1 },
4443 { 0x0, 32767 }, // 0x7FFF
4444 };
4445
4446 size_t nr_test_cases = sizeof(tc) / sizeof(TestCaseAluipc);
4447 for (size_t i = 0; i < nr_test_cases; ++i) {
4448 PC = 0;
4449 uint32_t rs = run_aluipc(tc[i].imm16);
4450 // Now, the program_counter (PC) is set
4451 uint32_t rs_expected = ~0x0FFFF & (PC + (tc[i].imm16 << 16));
4452 CHECK_EQ(rs_expected, rs);
4453 }
4454 }
4455 }
4456
4457
4458
4459
4460 uint32_t run_lwpc(int rs, int offset) {
4461 Isolate* isolate = CcTest::i_isolate();
4462 HandleScope scope(isolate);
4463
4464 MacroAssembler assm(isolate, NULL, 0);
4465
4466 // 256k instructions; 2^8k
4467 // addiu t3, a4, 0xffff; (0x250fffff)
4468 // ...
4469 // addiu t0, a4, 0x0000; (0x250c0000)
4470 uint32_t addiu_start_1 = 0x25000000;
4471 for (int32_t i = 0xfffff; i >= 0xc0000; --i) {
4472 uint32_t addiu_new = addiu_start_1 + i;
4473 __ dd(addiu_new);
4474 }
4475
4476 __ lwpc(t8, offset); // offset 0; 0xef080000 (t8 register)
4477 __ mov(v0, t8);
4478
4479 // 256k instructions; 2^8k
4480 // addiu a4, a4, 0x0000; (0x25080000)
4481 // ...
4482 // addiu a7, a4, 0xffff; (0x250bffff)
4483 uint32_t addiu_start_2 = 0x25000000;
4484 for (int32_t i = 0x80000; i <= 0xbffff; ++i) {
4485 uint32_t addiu_new = addiu_start_2 + i;
4486 __ dd(addiu_new);
4487 }
4488
4489 __ jr(ra);
4490 __ nop();
4491
4492 CodeDesc desc;
4493 assm.GetCode(&desc);
4494 Handle<Code> code = isolate->factory()->NewCode(
4495 desc, Code::ComputeFlags(Code::STUB), Handle<Code>());
4496
4497 F2 f = FUNCTION_CAST<F2>(code->entry());
4498
4499 uint32_t res =
4500 reinterpret_cast<uint32_t>(CALL_GENERATED_CODE(f, rs, offset, 0, 0, 0));
4501
4502 return res;
4503 }
4504
4505
4506 TEST(r6_lwpc) {
4507 if (IsMipsArchVariant(kMips32r6)) {
4508 CcTest::InitializeVM();
4509
4510 struct TestCaseLwpc {
4511 int rs;
4512 int offset;
4513 uint32_t expected_rs;
4514 };
4515
4516 struct TestCaseLwpc tc[] = {
4517 // rs, offset, expected_rs_value
4518 { t8.code(), -262144, 0x250fffff }, // offset 0x40000
4519 { t8.code(), -4, 0x250c0003 },
4520 { t8.code(), -1, 0x250c0000 },
4521 { t8.code(), 0, 0xef080000 },
4522 { t8.code(), 1, 0x03001025 }, // mov(v0, t8)
4523 { t8.code(), 2, 0x25080000 },
4524 { t8.code(), 4, 0x25080002 },
4525 { t8.code(), 262143, 0x250bfffd }, // offset 0x3ffff
4526 };
4527
4528 size_t nr_test_cases = sizeof(tc) / sizeof(TestCaseLwpc);
4529 for (size_t i = 0; i < nr_test_cases; ++i) {
4530 uint32_t res = run_lwpc(tc[i].rs, tc[i].offset);
4531 CHECK_EQ(tc[i].expected_rs, res);
4532 }
4533 }
4534 }
4535
4536
4537 uint32_t run_jic(int rt, int16_t offset) {
4538 Isolate* isolate = CcTest::i_isolate();
4539 HandleScope scope(isolate);
4540
4541 MacroAssembler assm(isolate, NULL, 0);
4542
4543 Label get_program_counter, stop_execution;
4544 __ push(ra);
4545 __ li(v0, 0);
4546 __ li(t1, 0x66);
4547
4548 __ addiu(v0, v0, 0x1); // <-- offset = -32
4549 __ addiu(v0, v0, 0x2);
4550 __ addiu(v0, v0, 0x10);
4551 __ addiu(v0, v0, 0x20);
4552 __ beq(v0, t1, &stop_execution);
4553 __ nop();
4554
4555 __ bal(&get_program_counter); // t0 <- program counter
4556 __ nop();
4557 __ jic(t0, offset); // JIC rt, offset
4558
4559 __ addiu(v0, v0, 0x100);
4560 __ addiu(v0, v0, 0x200);
4561 __ addiu(v0, v0, 0x1000);
4562 __ addiu(v0, v0, 0x2000); // <--- offset = 16
4563 __ pop(ra);
4564 __ jr(ra);
4565 __ nop();
4566
4567 __ bind(&get_program_counter);
4568 __ mov(t0, ra);
4569 __ jr(ra);
4570 __ nop();
4571
4572 __ bind(&stop_execution);
4573 __ pop(ra);
4574 __ jr(ra);
4575 __ nop();
4576
4577 CodeDesc desc;
4578 assm.GetCode(&desc);
4579 Handle<Code> code = isolate->factory()->NewCode(
4580 desc, Code::ComputeFlags(Code::STUB), Handle<Code>());
4581
4582 F2 f = FUNCTION_CAST<F2>(code->entry());
4583
4584 uint32_t res =
4585 reinterpret_cast<uint32_t>(CALL_GENERATED_CODE(f, rt, offset, 0, 0, 0));
4586
4587 return res;
4588 }
4589
4590
4591 TEST(r6_jic) {
4592 if (IsMipsArchVariant(kMips32r6)) {
4593 CcTest::InitializeVM();
4594
4595 struct TestCaseJic {
4596 uint32_t rt;
4597 int16_t offset;
4598 uint32_t expected_res;
4599 };
4600
4601 struct TestCaseJic tc[] = {
4602 // rt - formal argument; will contain value of the program counter
4603 // rt offset, expected_result
4604 { 0, 16, 0x2033 },
4605 //{ 0, 0, 0x0 }, // JIC in loop
4606 { 0, 4, 0x3333 },
4607 { 0, -32, 0x66 },
4608 };
4609
4610 size_t nr_test_cases = sizeof(tc) / sizeof(TestCaseJic);
4611 for (size_t i = 0; i < nr_test_cases; ++i) {
4612 uint32_t res = run_jic(tc[i].rt, tc[i].offset);
4613 CHECK_EQ(tc[i].expected_res, res);
4614 }
4615 }
4616 }
4617
4618
4619 uint64_t run_beqzc(int32_t rs, int32_t offset) {
4620 Isolate* isolate = CcTest::i_isolate();
4621 HandleScope scope(isolate);
4622
4623 MacroAssembler assm(isolate, NULL, 0);
4624
4625 Label stop_execution;
4626 __ li(v0, 0);
4627 __ li(t1, 0x66);
4628 __ push(ra);
4629
4630 __ addiu(v0, v0, 0x1); // <-- offset = -32
4631 __ addiu(v0, v0, 0x2);
4632 __ addiu(v0, v0, 0x10);
4633 __ addiu(v0, v0, 0x20);
4634 __ beq(v0, t1, &stop_execution);
4635 __ nop();
4636
4637 __ beqzc(a0, offset); // BEQZC rs, offset
4638
4639 __ addiu(v0, v0, 0x1);
4640 __ addiu(v0, v0, 0x100);
4641 __ addiu(v0, v0, 0x200);
4642 __ addiu(v0, v0, 0x1000);
4643 __ addiu(v0, v0, 0x2000); // <--- offset = 16
4644 __ jr(ra);
4645 __ nop();
4646
4647 __ bind(&stop_execution);
4648 __ pop(ra);
4649 __ jr(ra);
4650 __ nop();
4651
4652 CodeDesc desc;
4653 assm.GetCode(&desc);
4654 Handle<Code> code = isolate->factory()->NewCode(
4655 desc, Code::ComputeFlags(Code::STUB), Handle<Code>());
4656
4657 F2 f = FUNCTION_CAST<F2>(code->entry());
4658
4659 uint32_t res =
4660 reinterpret_cast<uint32_t>(CALL_GENERATED_CODE(f, rs, offset, 0, 0, 0));
4661
4662 return res;
4663 }
4664
4665
4666 TEST(r6_beqzc) {
4667 if (IsMipsArchVariant(kMips32r6)) {
4668 CcTest::InitializeVM();
4669
4670 struct TestCaseBeqzc {
4671 uint32_t rs;
4672 int32_t offset;
4673 uint32_t expected_res;
4674 };
4675
4676 struct TestCaseBeqzc tc[] = {
4677 // rs, offset, expected_result
4678 { 0x0, -8, 0x66 },
4679 { 0x0, 0, 0x3334 },
4680 { 0x0, 1, 0x3333 },
4681 { 0xabc, 1, 0x3334 },
4682 { 0x0, 4, 0x2033 },
4683 };
4684
4685 size_t nr_test_cases = sizeof(tc) / sizeof(TestCaseBeqzc);
4686 for (size_t i = 0; i < nr_test_cases; ++i) {
4687 uint32_t res = run_beqzc(tc[i].rs, tc[i].offset);
4688 CHECK_EQ(tc[i].expected_res, res);
4689 }
4690 }
4691 }
4692
4693
4694 uint32_t run_jialc(int rt, int16_t offset) {
4695 Isolate* isolate = CcTest::i_isolate();
4696 HandleScope scope(isolate);
4697
4698 MacroAssembler assm(isolate, NULL, 0);
4699
4700 Label main_block, get_program_counter;
4701 __ push(ra);
4702 __ li(v0, 0);
4703 __ beq(v0, v0, &main_block);
4704 __ nop();
4705
4706 // Block 1
4707 __ addiu(v0, v0, 0x1); // <-- offset = -40
4708 __ addiu(v0, v0, 0x2);
4709 __ jr(ra);
4710 __ nop();
4711
4712 // Block 2
4713 __ addiu(v0, v0, 0x10); // <-- offset = -24
4714 __ addiu(v0, v0, 0x20);
4715 __ jr(ra);
4716 __ nop();
4717
4718 // Block 3 (Main)
4719 __ bind(&main_block);
4720 __ bal(&get_program_counter); // t0 <- program counter
4721 __ nop();
4722 __ jialc(t0, offset); // JIALC rt, offset
4723 __ addiu(v0, v0, 0x4);
4724 __ pop(ra);
4725 __ jr(ra);
4726 __ nop();
4727
4728 // Block 4
4729 __ addiu(v0, v0, 0x100); // <-- offset = 20
4730 __ addiu(v0, v0, 0x200);
4731 __ jr(ra);
4732 __ nop();
4733
4734 // Block 5
4735 __ addiu(v0, v0, 0x1000); // <--- offset = 36
4736 __ addiu(v0, v0, 0x2000);
4737 __ jr(ra);
4738 __ nop();
4739
4740 __ bind(&get_program_counter);
4741 __ mov(t0, ra);
4742 __ jr(ra);
4743 __ nop();
4744
4745
4746 CodeDesc desc;
4747 assm.GetCode(&desc);
4748 Handle<Code> code = isolate->factory()->NewCode(
4749 desc, Code::ComputeFlags(Code::STUB), Handle<Code>());
4750
4751 F2 f = FUNCTION_CAST<F2>(code->entry());
4752
4753 uint32_t res =
4754 reinterpret_cast<uint32_t>(CALL_GENERATED_CODE(f, rt, offset, 0, 0, 0));
4755
4756 return res;
4757 }
4758
4759
4760 TEST(r6_jialc) {
4761 if (IsMipsArchVariant(kMips32r6)) {
4762 CcTest::InitializeVM();
4763
4764 struct TestCaseJialc {
4765 uint32_t rt;
4766 int16_t offset;
4767 uint32_t expected_res;
4768 };
4769
4770 struct TestCaseJialc tc[] = {
4771 // rt - formal argument; will contain value of the program counter
4772 // rt, offset, expected_result
4773 { 0, -40, 0x7 },
4774 { 0, -24, 0x34 },
4775 { 0, 20, 0x304 },
4776 { 0, 36, 0x3004 }
4777 };
4778
4779 size_t nr_test_cases = sizeof(tc) / sizeof(TestCaseJialc);
4780 for (size_t i = 0; i < nr_test_cases; ++i) {
4781 uint32_t res = run_jialc(tc[i].rt, tc[i].offset);
4782 CHECK_EQ(tc[i].expected_res, res);
4783 }
4784 }
4785 }
4786
4787
4788 uint64_t run_addiupc(int32_t imm19) {
4789 Isolate* isolate = CcTest::i_isolate();
4790 HandleScope scope(isolate);
4791
4792 MacroAssembler assm(isolate, NULL, 0);
4793
4794 // ADDIUPC rs, imm19
4795 __ addiupc(v0, imm19);
4796 __ jr(ra);
4797 __ nop();
4798
4799 CodeDesc desc;
4800 assm.GetCode(&desc);
4801 Handle<Code> code = isolate->factory()->NewCode(
4802 desc, Code::ComputeFlags(Code::STUB), Handle<Code>());
4803
4804 F2 f = FUNCTION_CAST<F2>(code->entry());
4805 PC = (uint32_t) f; // set program counter
4806
4807 uint32_t rs =
4808 reinterpret_cast<uint32_t>(CALL_GENERATED_CODE(f, imm19, 0, 0, 0, 0));
4809
4810 return rs;
4811 }
4812
4813
4814 TEST(r6_addiupc) {
4815 if (IsMipsArchVariant(kMips32r6)) {
4816 CcTest::InitializeVM();
4817
4818 struct TestCaseAddiupc {
4819 uint32_t rs_expected;
4820 int32_t imm19;
4821 };
4822
4823 struct TestCaseAddiupc tc[] = {
4824 // rs_expected - formal argument; will be calculated later
4825 // rs_expected, imm19
4826 { 0x0, -262144 }, // 0x40000
4827 { 0x0, -1 }, // 0x7FFFF
4828 { 0x0, 0 },
4829 { 0x0, 1 }, // 0x00001
4830 { 0x0, 262143 } // 0x3FFFF
4831 };
4832
4833 size_t nr_test_cases = sizeof(tc) / sizeof(TestCaseAddiupc);
4834 for (size_t i = 0; i < nr_test_cases; ++i) {
4835 PC = 0;
4836 uint32_t rs = run_addiupc(tc[i].imm19);
4837 // Now, the program_counter (PC) is set
4838 uint32_t rs_expected = PC + (tc[i].imm19 << 2);
4839 CHECK_EQ(rs_expected, rs);
4840 }
4841 }
4842 }
4843
4844
4346 #undef __ 4845 #undef __
OLDNEW

Powered by Google App Engine
This is Rietveld 408576698