| OLD | NEW |
| 1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 // A Disassembler object is used to disassemble a block of code instruction by | 5 // A Disassembler object is used to disassemble a block of code instruction by |
| 6 // instruction. The default implementation of the NameConverter object can be | 6 // instruction. The default implementation of the NameConverter object can be |
| 7 // overriden to modify register names or to do symbol lookup on addresses. | 7 // overriden to modify register names or to do symbol lookup on addresses. |
| 8 // | 8 // |
| 9 // The example below will disassemble a block of code and print it to stdout. | 9 // The example below will disassemble a block of code and print it to stdout. |
| 10 // | 10 // |
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| 79 void PrintSd(Instruction* instr); | 79 void PrintSd(Instruction* instr); |
| 80 void PrintSs1(Instruction* instr); | 80 void PrintSs1(Instruction* instr); |
| 81 void PrintSs2(Instruction* instr); | 81 void PrintSs2(Instruction* instr); |
| 82 void PrintBc(Instruction* instr); | 82 void PrintBc(Instruction* instr); |
| 83 void PrintCc(Instruction* instr); | 83 void PrintCc(Instruction* instr); |
| 84 void PrintFunction(Instruction* instr); | 84 void PrintFunction(Instruction* instr); |
| 85 void PrintSecondaryField(Instruction* instr); | 85 void PrintSecondaryField(Instruction* instr); |
| 86 void PrintUImm16(Instruction* instr); | 86 void PrintUImm16(Instruction* instr); |
| 87 void PrintSImm16(Instruction* instr); | 87 void PrintSImm16(Instruction* instr); |
| 88 void PrintXImm16(Instruction* instr); | 88 void PrintXImm16(Instruction* instr); |
| 89 void PrintXImm18(Instruction* instr); |
| 90 void PrintSImm18(Instruction* instr); |
| 91 void PrintXImm19(Instruction* instr); |
| 92 void PrintSImm19(Instruction* instr); |
| 89 void PrintXImm21(Instruction* instr); | 93 void PrintXImm21(Instruction* instr); |
| 90 void PrintXImm26(Instruction* instr); | 94 void PrintXImm26(Instruction* instr); |
| 91 void PrintCode(Instruction* instr); // For break and trap instructions. | 95 void PrintCode(Instruction* instr); // For break and trap instructions. |
| 92 void PrintFormat(Instruction* instr); // For floating format postfix. | 96 void PrintFormat(Instruction* instr); // For floating format postfix. |
| 97 void PrintBp2(Instruction* instr); |
| 98 void PrintBp3(Instruction* instr); |
| 93 // Printing of instruction name. | 99 // Printing of instruction name. |
| 94 void PrintInstructionName(Instruction* instr); | 100 void PrintInstructionName(Instruction* instr); |
| 95 | 101 |
| 96 // Handle formatting of instructions and their options. | 102 // Handle formatting of instructions and their options. |
| 97 int FormatRegister(Instruction* instr, const char* option); | 103 int FormatRegister(Instruction* instr, const char* option); |
| 98 int FormatFPURegister(Instruction* instr, const char* option); | 104 int FormatFPURegister(Instruction* instr, const char* option); |
| 99 int FormatOption(Instruction* instr, const char* option); | 105 int FormatOption(Instruction* instr, const char* option); |
| 100 void Format(Instruction* instr, const char* format); | 106 void Format(Instruction* instr, const char* format); |
| 101 void Unknown(Instruction* instr); | 107 void Unknown(Instruction* instr); |
| 102 int DecodeBreakInstr(Instruction* instr); | 108 int DecodeBreakInstr(Instruction* instr); |
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| 244 | 250 |
| 245 // Print 16-bit unsigned immediate value. | 251 // Print 16-bit unsigned immediate value. |
| 246 void Decoder::PrintUImm16(Instruction* instr) { | 252 void Decoder::PrintUImm16(Instruction* instr) { |
| 247 int32_t imm = instr->Imm16Value(); | 253 int32_t imm = instr->Imm16Value(); |
| 248 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%u", imm); | 254 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%u", imm); |
| 249 } | 255 } |
| 250 | 256 |
| 251 | 257 |
| 252 // Print 16-bit signed immediate value. | 258 // Print 16-bit signed immediate value. |
| 253 void Decoder::PrintSImm16(Instruction* instr) { | 259 void Decoder::PrintSImm16(Instruction* instr) { |
| 254 int32_t imm = ((instr->Imm16Value()) << 16) >> 16; | 260 int32_t imm = |
| 261 ((instr->Imm16Value()) << (32 - kImm16Bits)) >> (32 - kImm16Bits); |
| 255 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", imm); | 262 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", imm); |
| 256 } | 263 } |
| 257 | 264 |
| 258 | 265 |
| 259 // Print 16-bit hexa immediate value. | 266 // Print 16-bit hexa immediate value. |
| 260 void Decoder::PrintXImm16(Instruction* instr) { | 267 void Decoder::PrintXImm16(Instruction* instr) { |
| 261 int32_t imm = instr->Imm16Value(); | 268 int32_t imm = instr->Imm16Value(); |
| 262 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "0x%x", imm); | 269 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "0x%x", imm); |
| 263 } | 270 } |
| 264 | 271 |
| 265 | 272 |
| 273 // Print 18-bit signed immediate value. |
| 274 void Decoder::PrintSImm18(Instruction* instr) { |
| 275 int32_t imm = |
| 276 ((instr->Imm18Value()) << (32 - kImm18Bits)) >> (32 - kImm18Bits); |
| 277 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", imm); |
| 278 } |
| 279 |
| 280 |
| 281 // Print 18-bit hexa immediate value. |
| 282 void Decoder::PrintXImm18(Instruction* instr) { |
| 283 int32_t imm = instr->Imm18Value(); |
| 284 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "0x%x", imm); |
| 285 } |
| 286 |
| 287 |
| 288 // Print 19-bit hexa immediate value. |
| 289 void Decoder::PrintXImm19(Instruction* instr) { |
| 290 int32_t imm = instr->Imm19Value(); |
| 291 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "0x%x", imm); |
| 292 } |
| 293 |
| 294 |
| 295 // Print 19-bit signed immediate value. |
| 296 void Decoder::PrintSImm19(Instruction* instr) { |
| 297 int32_t imm19 = instr->Imm19Value(); |
| 298 // set sign |
| 299 imm19 <<= (32 - kImm19Bits); |
| 300 imm19 >>= (32 - kImm19Bits); |
| 301 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", imm19); |
| 302 } |
| 303 |
| 304 |
| 266 // Print 21-bit immediate value. | 305 // Print 21-bit immediate value. |
| 267 void Decoder::PrintXImm21(Instruction* instr) { | 306 void Decoder::PrintXImm21(Instruction* instr) { |
| 268 uint32_t imm = instr->Imm21Value(); | 307 uint32_t imm = instr->Imm21Value(); |
| 269 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "0x%x", imm); | 308 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "0x%x", imm); |
| 270 } | 309 } |
| 271 | 310 |
| 272 | 311 |
| 273 // Print 26-bit immediate value. | 312 // Print 26-bit immediate value. |
| 274 void Decoder::PrintXImm26(Instruction* instr) { | 313 void Decoder::PrintXImm26(Instruction* instr) { |
| 275 uint32_t imm = instr->Imm26Value() << kImmFieldShift; | 314 uint32_t imm = instr->Imm26Value() << kImmFieldShift; |
| 276 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "0x%x", imm); | 315 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "0x%x", imm); |
| 277 } | 316 } |
| 278 | 317 |
| 279 | 318 |
| 319 void Decoder::PrintBp2(Instruction* instr) { |
| 320 int bp2 = instr->Bp2Value(); |
| 321 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", bp2); |
| 322 } |
| 323 |
| 324 |
| 325 void Decoder::PrintBp3(Instruction* instr) { |
| 326 int bp3 = instr->Bp3Value(); |
| 327 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", bp3); |
| 328 } |
| 329 |
| 330 |
| 280 // Print 26-bit immediate value. | 331 // Print 26-bit immediate value. |
| 281 void Decoder::PrintCode(Instruction* instr) { | 332 void Decoder::PrintCode(Instruction* instr) { |
| 282 if (instr->OpcodeFieldRaw() != SPECIAL) | 333 if (instr->OpcodeFieldRaw() != SPECIAL) |
| 283 return; // Not a break or trap instruction. | 334 return; // Not a break or trap instruction. |
| 284 switch (instr->FunctionFieldRaw()) { | 335 switch (instr->FunctionFieldRaw()) { |
| 285 case BREAK: { | 336 case BREAK: { |
| 286 int32_t code = instr->Bits(25, 6); | 337 int32_t code = instr->Bits(25, 6); |
| 287 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, | 338 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, |
| 288 "0x%05x (%d)", code, code); | 339 "0x%05x (%d)", code, code); |
| 289 break; | 340 break; |
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| 388 // characters that were consumed from the formatting string. | 439 // characters that were consumed from the formatting string. |
| 389 int Decoder::FormatOption(Instruction* instr, const char* format) { | 440 int Decoder::FormatOption(Instruction* instr, const char* format) { |
| 390 switch (format[0]) { | 441 switch (format[0]) { |
| 391 case 'c': { // 'code for break or trap instructions. | 442 case 'c': { // 'code for break or trap instructions. |
| 392 DCHECK(STRING_STARTS_WITH(format, "code")); | 443 DCHECK(STRING_STARTS_WITH(format, "code")); |
| 393 PrintCode(instr); | 444 PrintCode(instr); |
| 394 return 4; | 445 return 4; |
| 395 } | 446 } |
| 396 case 'i': { // 'imm16u or 'imm26. | 447 case 'i': { // 'imm16u or 'imm26. |
| 397 if (format[3] == '1') { | 448 if (format[3] == '1') { |
| 398 DCHECK(STRING_STARTS_WITH(format, "imm16")); | 449 if (format[4] == '6') { |
| 399 if (format[5] == 's') { | 450 DCHECK(STRING_STARTS_WITH(format, "imm16")); |
| 400 DCHECK(STRING_STARTS_WITH(format, "imm16s")); | 451 switch (format[5]) { |
| 401 PrintSImm16(instr); | 452 case 's': |
| 402 } else if (format[5] == 'u') { | 453 DCHECK(STRING_STARTS_WITH(format, "imm16s")); |
| 403 DCHECK(STRING_STARTS_WITH(format, "imm16u")); | 454 PrintSImm16(instr); |
| 404 PrintSImm16(instr); | 455 break; |
| 405 } else { | 456 case 'u': |
| 406 DCHECK(STRING_STARTS_WITH(format, "imm16x")); | 457 DCHECK(STRING_STARTS_WITH(format, "imm16u")); |
| 407 PrintXImm16(instr); | 458 PrintSImm16(instr); |
| 459 break; |
| 460 case 'x': |
| 461 DCHECK(STRING_STARTS_WITH(format, "imm16x")); |
| 462 PrintXImm16(instr); |
| 463 break; |
| 464 } |
| 465 return 6; |
| 466 } else if (format[4] == '8') { |
| 467 DCHECK(STRING_STARTS_WITH(format, "imm18")); |
| 468 switch (format[5]) { |
| 469 case 's': |
| 470 DCHECK(STRING_STARTS_WITH(format, "imm18s")); |
| 471 PrintSImm18(instr); |
| 472 break; |
| 473 case 'x': |
| 474 DCHECK(STRING_STARTS_WITH(format, "imm18x")); |
| 475 PrintXImm18(instr); |
| 476 break; |
| 477 } |
| 478 return 6; |
| 479 } else if (format[4] == '9') { |
| 480 DCHECK(STRING_STARTS_WITH(format, "imm19")); |
| 481 switch (format[5]) { |
| 482 case 's': |
| 483 DCHECK(STRING_STARTS_WITH(format, "imm19s")); |
| 484 PrintSImm19(instr); |
| 485 break; |
| 486 case 'x': |
| 487 DCHECK(STRING_STARTS_WITH(format, "imm19x")); |
| 488 PrintXImm19(instr); |
| 489 break; |
| 490 } |
| 491 return 6; |
| 408 } | 492 } |
| 409 return 6; | |
| 410 } else if (format[3] == '2' && format[4] == '1') { | 493 } else if (format[3] == '2' && format[4] == '1') { |
| 411 DCHECK(STRING_STARTS_WITH(format, "imm21x")); | 494 DCHECK(STRING_STARTS_WITH(format, "imm21x")); |
| 412 PrintXImm21(instr); | 495 PrintXImm21(instr); |
| 413 return 6; | 496 return 6; |
| 414 } else if (format[3] == '2' && format[4] == '6') { | 497 } else if (format[3] == '2' && format[4] == '6') { |
| 415 DCHECK(STRING_STARTS_WITH(format, "imm26x")); | 498 DCHECK(STRING_STARTS_WITH(format, "imm26x")); |
| 416 PrintXImm26(instr); | 499 PrintXImm26(instr); |
| 417 return 6; | 500 return 6; |
| 418 } | 501 } |
| 419 } | 502 } |
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| 441 PrintSs1(instr); | 524 PrintSs1(instr); |
| 442 return 3; | 525 return 3; |
| 443 } else { | 526 } else { |
| 444 DCHECK(STRING_STARTS_WITH(format, "ss2")); /* ins size */ | 527 DCHECK(STRING_STARTS_WITH(format, "ss2")); /* ins size */ |
| 445 PrintSs2(instr); | 528 PrintSs2(instr); |
| 446 return 3; | 529 return 3; |
| 447 } | 530 } |
| 448 } | 531 } |
| 449 } | 532 } |
| 450 } | 533 } |
| 451 case 'b': { // 'bc - Special for bc1 cc field. | 534 case 'b': { |
| 452 DCHECK(STRING_STARTS_WITH(format, "bc")); | 535 switch (format[1]) { |
| 453 PrintBc(instr); | 536 case 'c': { // 'bc - Special for bc1 cc field. |
| 454 return 2; | 537 DCHECK(STRING_STARTS_WITH(format, "bc")); |
| 538 PrintBc(instr); |
| 539 return 2; |
| 540 } |
| 541 case 'p': { |
| 542 switch (format[2]) { |
| 543 case '2': { // 'bp2 |
| 544 DCHECK(STRING_STARTS_WITH(format, "bp2")); |
| 545 PrintBp2(instr); |
| 546 return 3; |
| 547 } |
| 548 case '3': { // 'bp3 |
| 549 DCHECK(STRING_STARTS_WITH(format, "bp3")); |
| 550 PrintBp3(instr); |
| 551 return 3; |
| 552 } |
| 553 } |
| 554 } |
| 555 } |
| 455 } | 556 } |
| 456 case 'C': { // 'Cc - Special for c.xx.d cc field. | 557 case 'C': { // 'Cc - Special for c.xx.d cc field. |
| 457 DCHECK(STRING_STARTS_WITH(format, "Cc")); | 558 DCHECK(STRING_STARTS_WITH(format, "Cc")); |
| 458 PrintCc(instr); | 559 PrintCc(instr); |
| 459 return 2; | 560 return 2; |
| 460 } | 561 } |
| 461 case 't': | 562 case 't': |
| 462 PrintFormat(instr); | 563 PrintFormat(instr); |
| 463 return 1; | 564 return 1; |
| 464 } | 565 } |
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| 1128 break; | 1229 break; |
| 1129 } | 1230 } |
| 1130 case EXT: { | 1231 case EXT: { |
| 1131 Format(instr, "ext 'rt, 'rs, 'sa, 'ss1"); | 1232 Format(instr, "ext 'rt, 'rs, 'sa, 'ss1"); |
| 1132 break; | 1233 break; |
| 1133 } | 1234 } |
| 1134 case DEXT: { | 1235 case DEXT: { |
| 1135 Format(instr, "dext 'rt, 'rs, 'sa, 'ss1"); | 1236 Format(instr, "dext 'rt, 'rs, 'sa, 'ss1"); |
| 1136 break; | 1237 break; |
| 1137 } | 1238 } |
| 1138 case BITSWAP: { | 1239 case BSHFL: { |
| 1139 Format(instr, "bitswap 'rd, 'rt"); | 1240 int sa = instr->SaFieldRaw() >> kSaShift; |
| 1140 break; | 1241 switch (sa) { |
| 1141 } | 1242 case BITSWAP: { |
| 1142 case DBITSWAP: { | 1243 Format(instr, "bitswap 'rd, 'rt"); |
| 1143 switch (instr->SaFieldRaw()) { | |
| 1144 case DBITSWAP_SA: | |
| 1145 Format(instr, "dbitswap 'rd, 'rt"); | |
| 1146 break; | 1244 break; |
| 1147 default: | 1245 } |
| 1246 case SEB: |
| 1247 case SEH: |
| 1248 case WSBH: |
| 1148 UNREACHABLE(); | 1249 UNREACHABLE(); |
| 1250 break; |
| 1251 default: { |
| 1252 sa >>= kBp2Bits; |
| 1253 switch (sa) { |
| 1254 case ALIGN: { |
| 1255 Format(instr, "align 'rd, 'rs, 'rt, 'bp2"); |
| 1256 break; |
| 1257 } |
| 1258 default: |
| 1259 UNREACHABLE(); |
| 1260 break; |
| 1261 } |
| 1262 break; |
| 1263 } |
| 1149 } | 1264 } |
| 1150 break; | 1265 break; |
| 1151 } | 1266 } |
| 1267 case DBSHFL: { |
| 1268 int sa = instr->SaFieldRaw() >> kSaShift; |
| 1269 switch (sa) { |
| 1270 case DBITSWAP: { |
| 1271 switch (instr->SaFieldRaw() >> kSaShift) { |
| 1272 case DBITSWAP_SA: |
| 1273 Format(instr, "dbitswap 'rd, 'rt"); |
| 1274 break; |
| 1275 default: |
| 1276 UNREACHABLE(); |
| 1277 break; |
| 1278 } |
| 1279 break; |
| 1280 } |
| 1281 case DSBH: |
| 1282 case DSHD: |
| 1283 UNREACHABLE(); |
| 1284 break; |
| 1285 default: { |
| 1286 sa >>= kBp3Bits; |
| 1287 switch (sa) { |
| 1288 case DALIGN: { |
| 1289 Format(instr, "dalign 'rd, 'rs, 'rt, 'bp3"); |
| 1290 break; |
| 1291 } |
| 1292 default: |
| 1293 UNREACHABLE(); |
| 1294 break; |
| 1295 } |
| 1296 break; |
| 1297 } |
| 1298 } |
| 1299 break; |
| 1300 } |
| 1152 default: | 1301 default: |
| 1153 UNREACHABLE(); | 1302 UNREACHABLE(); |
| 1154 } | 1303 } |
| 1155 } | 1304 } |
| 1156 | 1305 |
| 1157 | 1306 |
| 1158 int Decoder::DecodeTypeRegister(Instruction* instr) { | 1307 int Decoder::DecodeTypeRegister(Instruction* instr) { |
| 1159 switch (instr->OpcodeFieldRaw()) { | 1308 switch (instr->OpcodeFieldRaw()) { |
| 1160 case COP1: // Coprocessor instructions. | 1309 case COP1: // Coprocessor instructions. |
| 1161 DecodeTypeRegisterCOP1(instr); | 1310 DecodeTypeRegisterCOP1(instr); |
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| 1306 } else if ((instr->RtFieldRaw() != instr->RsFieldRaw()) | 1455 } else if ((instr->RtFieldRaw() != instr->RsFieldRaw()) |
| 1307 && (instr->RsFieldRaw() != 0) && (instr->RtFieldRaw() != 0)) { | 1456 && (instr->RsFieldRaw() != 0) && (instr->RtFieldRaw() != 0)) { |
| 1308 Format(instr, "bltc 'rs, 'rt, 'imm16u"); | 1457 Format(instr, "bltc 'rs, 'rt, 'imm16u"); |
| 1309 } else if ((instr->RsFieldRaw() == 0) | 1458 } else if ((instr->RsFieldRaw() == 0) |
| 1310 && (instr->RtFieldRaw() != 0)) { | 1459 && (instr->RtFieldRaw() != 0)) { |
| 1311 Format(instr, "bgtzc 'rt, 'imm16u"); | 1460 Format(instr, "bgtzc 'rt, 'imm16u"); |
| 1312 } else { | 1461 } else { |
| 1313 UNREACHABLE(); | 1462 UNREACHABLE(); |
| 1314 } | 1463 } |
| 1315 break; | 1464 break; |
| 1316 case BEQZC: | 1465 case POP66: |
| 1317 if (instr->RsFieldRaw() != 0) { | 1466 if (instr->RsValue() == JIC) { |
| 1467 Format(instr, "jic 'rt, 'imm16s"); |
| 1468 } else { |
| 1318 Format(instr, "beqzc 'rs, 'imm21x"); | 1469 Format(instr, "beqzc 'rs, 'imm21x"); |
| 1319 } | 1470 } |
| 1320 break; | 1471 break; |
| 1321 case BNEZC: | 1472 case POP76: |
| 1322 if (instr->RsFieldRaw() != 0) { | 1473 if (instr->RsValue() == JIALC) { |
| 1474 Format(instr, "jialc 'rt, 'imm16x"); |
| 1475 } else { |
| 1323 Format(instr, "bnezc 'rs, 'imm21x"); | 1476 Format(instr, "bnezc 'rs, 'imm21x"); |
| 1324 } | 1477 } |
| 1325 break; | 1478 break; |
| 1326 // ------------- Arithmetic instructions. | 1479 // ------------- Arithmetic instructions. |
| 1327 case ADDI: | 1480 case ADDI: |
| 1328 if (kArchVariant != kMips64r6) { | 1481 if (kArchVariant != kMips64r6) { |
| 1329 Format(instr, "addi 'rt, 'rs, 'imm16s"); | 1482 Format(instr, "addi 'rt, 'rs, 'imm16s"); |
| 1330 } else { | 1483 } else { |
| 1331 // Check if BOVC or BEQC instruction. | 1484 // Check if BOVC or BEQC instruction. |
| 1332 if (instr->RsFieldRaw() >= instr->RtFieldRaw()) { | 1485 if (instr->RsFieldRaw() >= instr->RtFieldRaw()) { |
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| 1447 break; | 1600 break; |
| 1448 case LDC1: | 1601 case LDC1: |
| 1449 Format(instr, "ldc1 'ft, 'imm16s('rs)"); | 1602 Format(instr, "ldc1 'ft, 'imm16s('rs)"); |
| 1450 break; | 1603 break; |
| 1451 case SWC1: | 1604 case SWC1: |
| 1452 Format(instr, "swc1 'ft, 'imm16s('rs)"); | 1605 Format(instr, "swc1 'ft, 'imm16s('rs)"); |
| 1453 break; | 1606 break; |
| 1454 case SDC1: | 1607 case SDC1: |
| 1455 Format(instr, "sdc1 'ft, 'imm16s('rs)"); | 1608 Format(instr, "sdc1 'ft, 'imm16s('rs)"); |
| 1456 break; | 1609 break; |
| 1610 case PCREL: { |
| 1611 int32_t imm21 = instr->Imm21Value(); |
| 1612 // rt field: 5-bits checking |
| 1613 uint8_t rt = (imm21 >> kImm16Bits); |
| 1614 switch (rt) { |
| 1615 case ALUIPC: |
| 1616 Format(instr, "aluipc 'rs, 'imm16s"); |
| 1617 break; |
| 1618 case AUIPC: |
| 1619 UNREACHABLE(); |
| 1620 break; |
| 1621 default: { |
| 1622 // rt field: checking of the most significant 3-bits |
| 1623 rt = (imm21 >> kImm18Bits); |
| 1624 switch (rt) { |
| 1625 case LDPC: |
| 1626 Format(instr, "ldpc 'rs, 'imm18s"); |
| 1627 break; |
| 1628 default: { |
| 1629 // rt field: checking of the most significant 2-bits |
| 1630 rt = (imm21 >> kImm19Bits); |
| 1631 switch (rt) { |
| 1632 case LWUPC: |
| 1633 UNREACHABLE(); |
| 1634 break; |
| 1635 case LWPC: |
| 1636 Format(instr, "lwpc 'rs, 'imm19s"); |
| 1637 break; |
| 1638 case ADDIUPC: |
| 1639 Format(instr, "addiupc 'rs, 'imm19s"); |
| 1640 break; |
| 1641 default: |
| 1642 UNREACHABLE(); |
| 1643 break; |
| 1644 } |
| 1645 break; |
| 1646 } |
| 1647 } |
| 1648 break; |
| 1649 } |
| 1650 } |
| 1651 break; |
| 1652 } |
| 1457 default: | 1653 default: |
| 1458 printf("a 0x%x \n", instr->OpcodeFieldRaw()); | 1654 printf("a 0x%x \n", instr->OpcodeFieldRaw()); |
| 1459 UNREACHABLE(); | 1655 UNREACHABLE(); |
| 1460 break; | 1656 break; |
| 1461 } | 1657 } |
| 1462 } | 1658 } |
| 1463 | 1659 |
| 1464 | 1660 |
| 1465 void Decoder::DecodeTypeJump(Instruction* instr) { | 1661 void Decoder::DecodeTypeJump(Instruction* instr) { |
| 1466 switch (instr->OpcodeFieldRaw()) { | 1662 switch (instr->OpcodeFieldRaw()) { |
| 1467 case J: | 1663 case J: |
| 1468 Format(instr, "j 'imm26x"); | 1664 Format(instr, "j 'imm26x"); |
| 1469 break; | 1665 break; |
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| 1583 prev_pc, *reinterpret_cast<int32_t*>(prev_pc), buffer.start()); | 1779 prev_pc, *reinterpret_cast<int32_t*>(prev_pc), buffer.start()); |
| 1584 } | 1780 } |
| 1585 } | 1781 } |
| 1586 | 1782 |
| 1587 | 1783 |
| 1588 #undef UNSUPPORTED | 1784 #undef UNSUPPORTED |
| 1589 | 1785 |
| 1590 } // namespace disasm | 1786 } // namespace disasm |
| 1591 | 1787 |
| 1592 #endif // V8_TARGET_ARCH_MIPS64 | 1788 #endif // V8_TARGET_ARCH_MIPS64 |
| OLD | NEW |