| Index: src/mips/debug-mips.cc
|
| diff --git a/src/mips/debug-mips.cc b/src/mips/debug-mips.cc
|
| index 47eba1664d65d8cf4a72ec27bd1c82319adfe4e5..45dbc75cc41b2a213af50385636c8fe002cfe3f8 100644
|
| --- a/src/mips/debug-mips.cc
|
| +++ b/src/mips/debug-mips.cc
|
| @@ -153,8 +153,8 @@ void DebugCodegen::GenerateCallICStubDebugBreak(MacroAssembler* masm) {
|
| void DebugCodegen::GenerateLoadICDebugBreak(MacroAssembler* masm) {
|
| Register receiver = LoadDescriptor::ReceiverRegister();
|
| Register name = LoadDescriptor::NameRegister();
|
| - RegList regs = receiver.bit() | name.bit() |
|
| - VectorLoadICTrampolineDescriptor::SlotRegister().bit();
|
| + Register slot = LoadDescriptor::SlotRegister();
|
| + RegList regs = receiver.bit() | name.bit() | slot.bit();
|
| Generate_DebugBreakCallHelper(masm, regs, 0);
|
| }
|
|
|
|
|